Sega Mega Drive/Hardware comparison
From Sega Retro
- For technical details on the Sega Mega Drive, see Sega Mega Drive/Technical specifications.
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This article presents a hardware comparison between the Sega Mega Drive (Genesis) and other rival systems in its time, most notably the SNES. It compares the technical specifications and hardware advantages/disadvantages between the systems.
Contents
Vs. SNES
Main CPU
The Mega Drive's main CPU (central processing unit) is clocked over two times faster than the one in its rival product, the SNES. Sega's Motorola 68000 processor is clocked at 7.67 MHz, compared to the 3.58 MHz clock speed of Nintendo's Ricoh 5A22 S-CPU (an adaptation of the 65c816 with additional features). However, the idea of simply comparing CPU clock rates to determine performance, regardless of other characteristics, is commonly known as the megahertz myth. While the S-CPU did run slower in clock cycles per second, it required less clock cycles for most instructions, giving it an overall comparable MIPS (million instructions per second) performance to the 68000. In other words, the 68000's higher clock rate is not the reason the 68000 performs faster than the S-CPU.
The 68000's faster performance essentially comes from having a wider data bus, or higher "bits", than the S-CPU. The 68000 is a hybrid 16/32-bit CPU, whereas the S-CPU is a hybrid 8/16-bit CPU. The 68000 has a wider 32-bit internal data bus (double the S-CPU's 16-bit internal data bus) and a wider 16-bit external data bus (double the S-CPU's 8-bit external data bus). This means that, in a single cycle, the 68000 can process a 32-bit instruction while accessing 16-bit data from memory, whereas the S-CPU in a single cycle can process a 16-bit instruction while only accessing 8-bit data from memory. The 68000 also has a hybrid 16/32-bit instruction set,[1] 16×16-bit multiplier, and 32/16-bit divider, whereas the SNES has a hybrid 8/16-bit instruction set, 8×8-bit multiplier, and 16/8-bit divider. This means that the Mega Drive is essentially a hybrid 16/32-bit system, whereas the SNES is a hybrid 8/16-bit system.[2]
The wider multiplier and divider gives the 68000 a performance advantage for arithmetic. While the 68000 and 5A22 are roughly on-par for arithmetic involving smaller 8-bit numbers (up to 256), the 68000 is faster for arithmetic involving larger 16-bit numbers (up to 65,536) and 32-bit numbers (up to 4 billion). So while both are on-par for basic arithmetic involving smaller numbers, the 68000 is faster for more complex arithmetic involving large numbers or more precision (such as calculating 3D polygons, for example). In addition, the 68000 has faster memory bandwidth (due to having a wider data bus) and more registers. The 68000 also had a shared codebase with arcade games, where the 68000 saw widespread use, allowing more efficient arcade conversions.
Overall, the 68000 is only slightly faster than the S-CPU for most operations, but is significantly faster for some operations, such as arithmetic operations dealing with multiplication or larger 32-bit numbers. On the other hand, the S-CPU has a DMA unit, which the 68000 lacks, though that is because the Mega Drive's DMA unit is located in its VDP graphics processor instead. The 68000 alone does not give the Mega Drive a significant performance advantage, but it's the combination of the 68000 with the VDP's DMA unit, along with faster memory, that gives the system a significant performance advantage over the SNES.
Console | Sega Mega Drive[3] | Super Nintendo[4][5][6][7] | |
---|---|---|---|
Main CPU | Motorola 68000 | Ricoh 5A22 S-CPU (based on 65c816) | |
Clock rate | NTSC | 7.670454 MHz | 2.684658–3.579545 MHz |
PAL | 7.600489 MHz | 2.660171–3.546895 MHz | |
Bits | Data bus width | 32-bit internal, 16-bit external | 16-bit internal, 8-bit external |
Word length | 16-bit | 16-bit | |
Internal instructions |
Registers | 16× 32-bit registers | 4× 16-bit registers, 4× 8-bit registers |
Instruction set | 16-bit, 32-bit | 8-bit, 16-bit | |
Instructions per second |
1.342329 MIPS (NTSC), 1.330085 MIPS (PAL) |
1.125–1.5 MIPS (NTSC), 1.114738–1.486318 MIPS (PAL) | |
Arithmetic logic unit(s) |
ALU(s) | 16-bit data ALU, 32-bit address ALU (2× 16-bit ALU) |
16-bit ALU |
Multiplier | 16×16-bit[2] | 8×8-bit[2] | |
Divider | 32/16-bit[2] | 16/8-bit[2] | |
Work RAM | Memory | 64 KB PSRAM (16-bit, 5.263157 MHz) |
128 KB DRAM (8-bit, 2.660171–2.684658 MHz) |
Bandwidth | 10.526314 MB/s | 2.684658 MB/s (NTSC), 2.660171 MB/s (PAL) | |
CPU access (NTSC) | 3.835226 MB/s,[n 1] 62 KB per frame | 2.684658 MB/s,[n 2] 43 KB per frame | |
CPU access (PAL) | 3.800244 MB/s,[n 3] 73 KB per frame | 2.660171 MB/s,[n 4] 51 KB per frame | |
Cartridge ROM |
Memory | 128 KB to 8 MB | 128 KB to 6 MB |
Bandwidth | 10–15.340906 MB/s | 2.5–3.579545 MB/s | |
CPU access | 3.835226 MB/s (NTSC), 3.800244 MB/s (PAL) |
2.684658–3.579545 MB/s (NTSC), 2.660171–3.546895 MB/s (PAL)[n 5] | |
8-bit arithmetic (-128 to 256) |
Additions (8+8-bit)[n 6] | 1.7 million adds/sec[8] | 1.7 million adds/sec[n 7] |
Multiplications (8×8-bit) | 540,000 multiplies/sec[n 8] | 440,000 multiplies/sec[n 9] | |
Divisions (16/8-bit) | 200,000 divides/sec[n 10] | 180,000 divides/sec[n 11] | |
16-bit arithmetic (-32,768 to 65,536) |
Additions (16+16-bit)[n 6] | 1.7 million adds/sec[8] | 1.1 million adds/sec[n 12] |
Multiplications (16×16-bit) | 120,000 multiplies/sec[8] | 32,000 multiplies/sec[n 13] | |
Divisions (16/16-bit) | 120,000 divides/sec[8] | 51,000 divides/sec[n 14] | |
32-bit arithmetic (-2 billion to 4 billion) |
Additions (32+32-bit)[n 6] | 880,000 adds/sec[8] | 100,000 adds/sec[n 15] |
Multiplications (32×32-bit) | 100,000 multiplies/sec[n 16] | 17,000 multiplies/sec[n 17] | |
Divisions (32/16-bit) | 120,000 divides/sec[8] | 20,000 divides/sec[n 18] | |
3D polygon geometry calculations |
Vertices | 10,000 vertices/sec[18] | 2200 vertices/sec[n 19] |
Triangle polygons | 3300 triangles/sec | 700 triangles/sec |
GPU and DMA
The Sega Mega Drive's Yamaha YM7101 VDP graphics processor has a powerful DMA unit that could handle DMA (direct memory access) operations at significantly faster speeds than the SNES. This is sometimes referred to as "blast processing".[1]
The Mega Drive's DMA unit is part of the VDP, which is located on the same Yamaha IC6 integrated circuit as the sound chips.[19] The combination of the VDP's high-speed DMA unit with the 68000 CPU as well as faster memory is essentially what gives the Mega Drive a significant performance advantage over the SNES. In comparison, the Super Nintendo's DMA unit is part of its Ricoh 5A22 S-CPU,[5] while its PPU graphics chips lack DMA. On the other hand, the PPU chips come with more built-in hardware graphics features, such as more colors on screen, larger sprites, and background scaling (Mode 7), most of which the VDP is also capable of with its fast DMA, but requires developers to manually program these features.
The Mega Drive's DMA unit could write to VRAM during active display, VBlank, and HBlank,[20] whereas the SNES CPU's DMA unit could only do so during VBlank and HBlank. The Mega Drive has higher memory bandwidth and is capable of quicker DMA transfer rates, giving it a faster performance than the SNES,[6] and helped give the Mega Drive a higher fillrate, higher gameplay resolution, faster parallax scrolling, fast data blitting, and high frame-rate with many moving objects on screen, and allowed it to display more unique tiles (background and sprite tiles) and large sprites (32×32 and higher) on screen, and quickly transfer more unique tiles and large sprites (16×16 and higher) on screen. The Mega Drive's graphics are also rendered with a packed pixel format, which is more flexible and efficient than the Super Nintendo's planar graphics format (except for Mode 7 which also uses packed pixels).
The Mega Drive's DMA capabilities, higher bandwidth, and packed pixel format, give it more flexibility, allowing the hardware to be programmed in various different ways. Combining the CPU's fast arithmetic with the VDP's fast DMA, it could replicate some of the SNES PPU hardware features with software programming, such as larger 64×64 sprites (combining 32×32 sprites), the scaling and rotation of background planes (like the Sega X Board and Mode 7), and direct color (increasing colors on screen); however, its software approach means that it cannot do Mode 7 as fast as the SNES nor can it display as many colors practically in a game. Other programmable capabilities include mid-frame palette swaps (increasing colors per scanline), bitmap framebuffers, sprite scaling and rotation, and ray casting. The Mega Drive could also playback full motion video (FMV) at a higher quality than the SNES. The base Mega Drive hardware (without needing any cartridge enhancement chips) could also render 3D polygon graphics with a performance almost approaching the SNES's optional Super FX (SFX) cartridge enhancement chip,[21][22] which itself was significantly outperformed by the Mega Drive's optional Sega Virtua Processor (SVP) cartridge enhancement chip.
One aspect of the SNES hardware that the Mega Drive cannot replicate with DMA is its color palette. While DMA programming techniques such as those mentioned above could allow the Mega Drive to match the 256 on-screen color display of the SNES, the Mega Drive cannot come close to the overall 32,768 selectable color palette of the SNES. But when in direct color mode (required for certain types of three-dimensional graphics, such as ray casting and 3D polygons), the SNES and Mega Drive are both on-par in terms of colors, as the SNES cannot use its 32,768 color palette in direct color mode.
Console | Sega Mega Drive[3] | Super Nintendo[4][5][6][7][23] | |
---|---|---|---|
System master clock rate |
NTSC | 53.693175 MHz | 21.47727 MHz |
PAL | 53.203424 MHz | 21.28137 MHz | |
Graphics processing unit (GPU) | Sega 315‑5313 VDP (Yamaha YM7101) | Ricoh S-PPU (PPU1 & PPU2) | |
Clock rate | NTSC | 13.423294 MHz | 5.579545 MHz (PPU1), 3.579545 MHz (PPU2) |
PAL | 13.300856 MHz | 5.320343 MHz (PPU1), 3.546895 MHz (PPU2) | |
Internal GPU cache |
Cache | 232 bytes (72 bytes CRAM, 80 bytes VSRAM, 80 bytes sprite buffer) |
1056 bytes (544 bytes PPU1 OAM, 512 bytes PPU2 CGRAM) |
Bandwidth | 26.846588 MB/s (NTSC), 26.601712 MB/s (PAL) | PPU1 OAM: 11.15909 MB/s (NTSC), 10.640685 MB/s (PAL) PPU2 CGRAM: 7.15909 MB/s (NTSC), 7.09379 MB/s (PAL) | |
Video RAM (VRAM) |
Memory | 64 KB VRAM (Dual-Port) (64 KB FPM DRAM, 256 bytes SAM buffer) |
64 KB SRAM (PPU1 VRAM) |
Bandwidth | 13.423294 MB/s (NTSC), 13.300856 MB/s (PAL) | 11.15909 MB/s (NTSC), 10.640685 MB/s (PAL) | |
Pixels | Pixel format | Packed pixel | Planar (Modes 1-6), packed pixel (Mode 7) |
Read fillrate | 6.650428–6.934358 MPixels/s (103,912–108,349 tiles/sec) |
5.320342–5.369317 MPixels/s (83,130–83,896 tiles/sec) | |
Tiles on screen | 1808 tiles | 1395 tiles (NTSC), 1536 tiles (PAL) | |
Resolution | Overscan | 427×262 (NTSC), 423×312 (PAL) | 341×262 (NTSC), 341×312 (PAL) |
Display resolution |
NTSC: 256×224 to 320×448 (default 320×224) PAL: 256×240 to 320×480 (default 320×240) |
NTSC: 256×224 to 512×448 (default 256×224) PAL: 256×240 to 512×480 (default 256×240) | |
Sprite capabilities |
Sprite fillrate | 4.90887 MTexels/s (76,701 sprites/sec), 320 texels per scanline |
4.282881 MTexels/s (66,920 sprites/sec), 272 texels per scanline |
Sprite tiles on screen |
1280 sprite tiles (8×8), shared with background tile memory | 512 sprite tiles (8×8), dedicated to sprites only | |
Sprite sizes | 16 sprites sizes (16 sizes on screen) (8×8, 8×16, 8×24, 8×32, 16×8, 16×16, 16×24, 16×32, 24×8, 24×16, 24×24, 24×32, 32×8, 32×16, 32×24, 32×32) |
6 sprite sizes (2 sizes on screen) official (8x8, 16x16, 32x32, 64x64), unofficial (16x32, 32x64) | |
Sprites per scanline (before dropout) |
20 sprites (8×8 to 16×16), 13 sprites (24×24), 10 sprites (32×32), 5 sprites (64×64) |
32 sprites (8×8), 17 sprites (16×16), 8 sprites (32×32), 4 sprites (64×64) | |
Sprites on screen (before dropout) |
80 sprites (8×8 to 32×32), 20 sprites (64×64), 5 sprites (128×128) |
128 sprites (8×8, 16×16), 69 sprites (32×32), 17 sprites (64×64), 4 sprites (128×128) | |
Unique sprites on screen |
80 sprites (8×8 to 32×32), 20 sprites (64×64), 5 sprites (128×128) (shared with background tile memory) |
128 sprites (8×8, 16×16), 32 sprites (32×32), 8 sprites (64×64), 2 sprites (128×128) (dedicated to sprites only) | |
Background planes |
Background tiles on screen (unique tiles) |
1344–1808 background tiles (shared with sprite tile memory) |
256–1024 background tiles (depends on background modes) |
Tilemap planes | 2 scrolling planes (1344–1808 tiles total), 1 static window that uses part of plane A Overlapping layers using plane priorities |
1–4 planes (256–1024 tiles) 2 window/shape masks cut from normal planes Overlapping layers using plane priorities | |
Tilemap resolution |
256×256 to 512×512 (2 planes, 1344–1808 tiles), 1024×256/256x1024 (2 planes, 1344–1424 tiles) |
256×256 to 1024×1024 (1–4 planes, 256–1024 tiles), 1024×1024 (Mode 7, 1 plane, 256 tiles) | |
Scrolling capabilities |
Parallax scrolling, tile scrolling, line scrolling, row scrolling (∀8px), column scrolling (∀16px), overlapping scrolling layers using plane priorities |
Parallax scrolling, tile scrolling, line scrolling, row scrolling (∀8px), column scrolling (∀8px), overlapping scrolling layers using plane priorities | |
Colors (without DMA) |
Color palette | 512 colors (default), 1536 colors (Shadow/Highlight) |
32,768 colors |
Colors on screen | 61–64 (default), 183–192 (Shadow/Highlight), Shared between backgrounds and sprites |
256 (default), 121–256 for backgrounds (depends on background and color mode), 128 dedicated to sprites (shared with backgrounds in 256 and direct color modes) | |
Colors per tile | 16 colors, 2 planes, and 16 colors for sprite tiles | Mode 0 (4 colors, 4 planes, and 16 colors for sprite tiles) Mode 1 (16 colors on 2 planes, 4 colors on 1 plane, and 16 colors for sprite tiles) | |
DMA controller | Sega 315‑5313 VDP (Yamaha YM7101) DMA unit | Ricoh 5A22 (CPU) DMA unit | |
Clock rate | NTSC | 13.423294 MHz | 2.684658–3.579545 MHz |
PAL | 13.300856 MHz | 2.660171–3.546895 MHz | |
DMA blitting bandwidth |
VBlank (inactive display) |
VRAM: 3.21845 MB/s, 205 bytes per scanline VDP cache: 6.4369 MB/s, 410 bytes per scanline |
NTSC: 2.684658 MB/s, 170.5 bytes per scanline PAL: 2.660171 MB/s, 170.5 bytes per scanline |
During active display (VRAM) |
320×224: 708.406 KB/s (NTSC), 1.09701 MB/s (PAL) 320×160: 1.437846 MB/s (NTSC), 1.702026 MB/s (PAL) |
256×224: 443.228 KB/s (NTSC), 795.11 KB/s (PAL) 256×192: 763.435 KB/s (NTSC), 1.061548 MB/s (PAL) | |
During active display (cache) |
320×224: 1.416813 MB/s (NTSC), 2.194021 MB/s (PAL) 320×160: 2.875692 MB/s (NTSC), 3.404052 MB/s (PAL) | ||
DMA blitting fillrate |
Write fillrate (VBlank/inactive display) |
6.4369 MPixels/s, 410 pixels (51 tiles) per scanline |
5.320342–5.369317 MPixels/s, 341 pixels (42 tiles) per scanline |
Write fillrate (during active display) |
1.416813–2.875692 MPixels/s (NTSC), 2.194021–3.404052 MPixels/s (PAL) |
886,457 pixels/s (NTSC), 1.59022 MPixels/s (PAL) | |
Tile blitting per frame (during active display) |
369 tiles (NTSC), 1070 tiles (PAL) | 230 tiles (NTSC), 496 tiles (PAL) | |
Sprite blitting per frame |
NTSC | 80 sprites (8×8 to 16×16), 41 sprites (24×24), 23 sprites (32×32), 5 sprites (64×64) |
128 sprites (8×8), 57 sprites (16×16), 14 sprites (32×32), 3 sprites (64×64) |
PAL | 80 sprites (8×8 to 24×24), 66 sprites (32×32), 16 sprites (64×64), 4 sprites (128×128) |
128 sprites (8×8), 124 sprites (16×16), 31 sprites (32×32), 7 sprites (64×64) | |
Scaling and rotation |
Background | DMA software rendering | Mode 7 hardware rendering |
Sprites | DMA software rendering | SuperFX enhancement chip required | |
Color DMA | Color palette | Up to 4096 colors (bitmap image) | 32,768 colors (default), 256–4096 colors (direct color) |
Colors on screen |
256–512 (direct color), 1536 (scrolling image), 4096 (static image) |
256-512 (direct color), 2723 (static image), Hundreds more via HDMA changing background color per-scanline | |
Colors per tile | 16–256 colors (palette swap), 64–512 colors (direct color) |
4–256 colors (standard) | |
3D polygon rendering |
Flat shading | 1800 polygons/sec | 400 polygons/sec[n 20] |
Texture mapping | 1000 polygons/sec | 100 polygons/sec[n 21] | |
Full motion video (FMV) |
Maximum bitrate | 4.608 Mbps (576 KB/s, 24 KB per frame) | 1.773 Mbps (222 KB/s, 18 KB per frame)[33] |
Maximum quality | 320×224 resolution, 8-bit color | 256×224 resolution, 8-bit color[33] |
Audio
The Mega Drive's audio hardware includes a sound CPU, the Zilog Z80, along with two sound chips, the Yamaha YM2612 and the Sega PSG, both located on the same Sega-Yamaha IC6 integrated circuit as the Yamaha VDP graphics processor, with the PSG located within the VDP itself. The Super Nintendo's audio processing unit, the Sony S-SMP, includes an audio CPU, the Sony SPC700, and a DSP sound chip, the S-DSP.
The Mega Drive's Z80 audio CPU has over three times the clock rate of the Super Nintendo's SPC700 audio CPU. However, the SPC700 requires less cycles per instruction, so the Z80 is only slightly faster for most operations. What gives the Z80 a significant performance advantage, however, is that it has direct memory access to the 68000 address space (in addition to its own internal 8 KB sound RAM), allowing it to stream data directly from the ROM cartridge, whereas the SPC700 only has direct access to its limited 64 KB internal sound RAM (where the main 5A22 S-CPU needs to transfer the audio data). This allows the Mega Drive to stream audio data from the ROM cartridge at a higher speed than the SNES, as well as giving the Z80 more flexibility to be used for non-audio purposes (such as Sega Master System emulation, for example).
The Mega Drive's YM2612 sound chip has a sound output of 53 kHz, higher than the Super Nintendo's S-DSP which has a 32 kHz output, giving the YM2612 a wider frequency range. The S-DSP also uses Gaussian filtering, which eliminates noise by cutting-off the lowest and highest frequencies, at the expense of further limiting the frequency range, creating a muffled sound. The Mega Drive's greater frequency range, on the other hand, provides sharper audio clarity, but with more noise heard at at the highest frequencies, while a lowpass filter reduces noise at the lowest frequencies on both systems (with the Super Nintendo's Gaussian filter further reducing noise at the expense of muffling).
The Mega Drive's sound chips have more sound channels than the Super Nintendo's S-DSP. The S-DSP only supports PCM sampling, whereas the Mega Drive's YM2612 supports both FM synthesis and PCM sampling while the PSG provides additional synthesized channels. Most Mega Drive games primarily used FM synthesis, which requires significantly less data than PCM samples, making FM synthesis much more efficient for memory, storage and bandwidth. The YM2612 was essentially a cut-down version of the FM synthesis chips used in Yamaha synthesizers at the time, allowing the Mega Drive to be used as a cheap synthesizer in addition to limited sampling capabilities, whereas the SNES could only playback pre-recorded samples.
In terms of PCM sampling capabilities, the S-SMP supports 8 PCM channels, whereas the YM2612 only has a single PCM channel, but it can emulate 2-4 PCM channels with software mixing. The S-SMP's PCM sampling is limited to 16-bit 32 kHz quality, slightly higher than the YM2612's PCM sampling which is limited to 8-bit 32 kHz quality. Due to the Z80 having direct access to the ROM cartridge, the YM2612 can stream PCM audio directly from the ROM cartridge, whereas the S-SMP can only access samples from its limited 64 KB sound RAM, relying on the main S-CPU to transfer samples from the ROM cartridge. This allows the YM2612 to stream high-quality PCM audio at a high bitrate without straining the main 68000 CPU (saving most of its bandwidth for graphics or game logic),[34] whereas streaming high-quality PCM audio on the SNES strains the main S-CPU (significantly reducing its bandwidth for graphics or game logic).
The Mega Drive's secondary sound chip, the PSG, can also play PCM samples, by using its three tone channels to make up a single PCM channel. It can play mono samples with up to 44.1 kHz sample rate (at 4-bit depth) or up to 12-bit audio depth (at 11.025 kHz). Some Mega Drive games use the PSG for playing PCM samples, such as After Burner II.[35] However, playing a high-quality 44 kHz sample with the PSG can strain the Z80, whereas playing a 32 kHz sample with the YM2612 uses only a fraction of the Z80's bandwidth. Nevertheless, it is technically possible to use the 68000 CPU to handle PCM playback (1-4 channels) on the YM2612 chip, and the Z80 CPU to handle PCM playback (1 channel) on the PSG chip, for a total of 2-5 PCM channels on the Mega Drive, in addition to 5 FM channels. However, it is worth noting that most Mega Drive games didn't make much use of the system's PCM capabilities, as FM synthesis was much more memory efficient, while PCM sampling also required more complex programming on the Mega Drive.
Console | Sega Mega Drive[3] | Super Nintendo[4][5][6] | |
---|---|---|---|
System master clock rate |
NTSC | 53.693175 MHz | 24.576 MHz |
PAL | 53.203424 MHz | 24.576 MHz | |
Audio CPU | Zilog Z80 | Sony SPC700 | |
Clock rate | NTSC | 3.579545 MHz | 1.024 MHz |
PAL | 3.546894 MHz | 1.024 MHz | |
Bits | Bus width | 8-bit | 8-bit |
Word length | 8-bit | 8-bit | |
Instruction set | 8-bit, 16-bit | 8-bit, 16-bit | |
Instructions per second |
NTSC | 0.519034 MIPS | 0.44032 MIPS[36] |
PAL | 0.5143 MIPS | 0.44032 MIPS | |
Sound RAM | Memory | 8 KB SRAM/XRAM (8-bit, 3.030303 MHz) | 64 KB SRAM (8-bit, 1.024 MHz) |
Bandwidth | 3.030303 MB/s | 1.024 MB/s | |
Memory access | Addressable memory | 8 KB sound RAM, 64 KB work RAM (32 KB banks), 128 KB to 8 MB cartridge ROM (32 KB banks) |
64 KB sound RAM |
RAM access bandwidth | 1.193182 MB/s (NTSC), 1.182298 MB/s (PAL)[37] |
1.024 MB/s | |
Cartridge ROM access bandwidth |
1.191969 MB/s (NTSC), 1.181096 MB/s (PAL) | 128 KB/s (S-CPU)[38] | |
Sound chip(s) | Yamaha YM2612, Sega PSG[39] | Sony S-DSP | |
Clock rate | NTSC | 7.670454 MHz (YM2612), 3.579545 MHz (PSG) | 2.048 MHz |
PAL | 7.600489 MHz (YM2612), 3.546894 MHz (PSG) | 2.048 MHz | |
Sound output | Speakers | Mono, stereo | Mono, stereo, virtual surround sound |
Frequency | 53.267 kHz (NTSC), 52.781 kHz (PAL) | 32 kHz | |
Sound channels | Total channels | 11 channels (hardware), 12-14 channels (software mixing) |
8 channels |
Synthesis channels | 11 channels (6 FM, 1 LFO, 3 square waves, 1 noise) |
N/A | |
PCM sample channels | 1-2 channels (hardware), 2-5 channels (software mixing) |
8 channels | |
FM synthesis | FM channels | 6 channels (or 5 channels with PCM) | N/A |
Operators | 24 operators (4 operators per channel) | ||
PCM sampling | File formats | PCM, DPCM, ADPCM, VGM, XGM, TFM, WAV, MOD | PCM (16-bit), ADPCM (4-bit),[40] BRR[41] |
Streaming bandwidth | 1000 KB/s (8000 Kbps) | 128 KB/s (1024 Kbps) | |
Maximum bitrate | 1200 Kbps (150 KB/s)[n 22] | 1024 Kbps (128 KB/s)[n 23] | |
Maximum PCM sample rate |
4-bit depth (mono) | 44.1 kHz (1 channel)[43] + 22.05 kHz (2 channels)[42] | 32 kHz (8 channels) |
4-bit depth (stereo) | 22.05 kHz (2 channels) | 32 kHz (4 channels) / 16 kHz (8 channels) | |
8-bit depth | 32 kHz (1 channel)[42][44][34] / 20.5 kHz (2 channels)[45] / 16 kHz (4 channels)[42][43] |
N/A | |
12-bit depth | 11.025 kHz (1 channel)[43] | ||
16-bit depth (mono) | N/A | 32 kHz (2 channels) / 16 kHz (4 channels) / 8 kHz (8 channels) | |
16-bit depth (stereo) | N/A | 32 kHz (1 channel)[38] / 16 kHz (2 channels) / 8 kHz (4 channels) / 4 kHz (8 channels) |
Enhancement chips
Console | Sega Mega Drive[3] | Super Nintendo Entertainment System | |||
---|---|---|---|---|---|
Cartridge enhancement chip | Sega Virtua Processor[46] | DSP-1[5][47] | Super FX[48][49] | Super FX 2[48][49] | |
Co-processor | Sega 315-5750 (Samsung SSP1601) |
NEC µPD77C25 | Nintendo GSU-1 | Nintendo GSU-2 | |
Clock rate | 23.01136 MHz | 7.647059 MHz[n 24] | 10.738635 MHz | 21.47727 MHz | |
Cartridge RAM | Memory | 128 KB (FPM DRAM) | 2-32 KB (SRAM)[50] | 40-72 KB (SRAM) | 40-72 KB (SRAM) |
Bandwidth | 34.679066 MB/s (16-bit, 18.181818 MHz) |
6.666666 MB/s (8-bit, 6.666666 MHz)[50] |
10.738635 MB/s (8-bit, 10.738635 MHz)[51] |
14.285714 MB/s (8-bit, 14.285714 MHz)[51] | |
Fixed-point arithmetic |
Additions | 23,011,360 adds/sec | 596,000 adds/sec | 10,738,635 adds/sec[n 25] | 21,477,270 adds/sec |
Multiplications | 23,011,360 multiplies/sec | 294,117 multiplies/sec | 2,147,727 multiplies/sec[n 26] | 4,295,454 multiplies/sec | |
Divisions | 719,105 divides/sec | 77,519 divides/sec | 335,582 divides/sec[n 27] | 671,164 divides/sec | |
Scaling and rotation |
Background | Hardware rendering | Mode 7 | Mode 7 | Mode 7 |
Sprites | Hardware rendering | N/A | Hardware rendering | Hardware rendering | |
3D polygon graphics |
Geometry calculations |
50,000 polys/s | 1,900 polys/s[n 28] | 10,000 polys/s[n 29] | 20,000 polys/s |
Flat-shaded rendering |
20,000 polys/s | 940 polys/s[n 30] | 2000 polys/s[n 31] | 4000 polys/s | |
Texture mapping |
3000 polys/s | 660 polys/s[n 32] | 1000 polys/s[n 33] | 2000 polys/s |
Vs. Amiga
The Mega Drive was generally more powerful than the Amiga. The Mega Drive's 68000 CPU is clocked at 7.6 MHz, while the Amiga's 68000 CPU was clocked at 7.16 MHz (NTSC) or 7.09 MHz (PAL). The Mega Drive displays eighty 15-color sprites at 32×32 pixels each, while the Amiga displays eight 3-color sprites at 8 pixels wide.[53] The Mega Drive displays 61–64 colors standard and 183–192 colors with Shadow/Highlight, while the Amiga displays 2–32 colors standard and 64 colors with EHB. The Mega Drive's VDP can DMA blit 3.21845–6.4 MB/s bandwidth (6.4 MPixels/s fillrate), while the Amiga's Blitter can blit 1.7725–3.58 MB/s (2.363333–4.773333 MPixels/s with 64 colors). During active display, with 64 colors at 60 FPS, the VDP can write 708 KB/s to 2 MB/s (1.4–2 MPixels/s) during 320×224 display, while the Blitter can write 332.5–700 KB/s (443,333–933,333 pixels/s) during 320×200 display.[54] The Mega Drive supports tilemap backgrounds, reducing processing, memory and bandwidth requirements by up to 64 times compared to the Amiga's bitmap backgrounds,[55] giving the Mega Drive an effective tile fillrate of 6–36 MPixels/s. The Mega Drive has a Z80 sound CPU and supports 10 audio channels, while the Amiga lacks a sound CPU and supports 4 audio channels.[53]
Vs. other systems
It was the most powerful console at the time of its release in 1988, surpassing the PC Engine (TurboGrafx-16), and it was not surpassed in power until the Neo Geo in 1990.
Compared to home computers at the time, it was not as powerful as the Japan-exclusive X68000 (released 1987) or FM Towns (released 1989). But the Mega Drive was generally more powerful than Western home computers in the late '80s.
Notes
- ↑ [16-bit data bus, 7.670454 MHz (NTSC), 4 cycles per word, 16-bit (2 bytes) per word, 2 cycles per byte 16-bit data bus, 7.670454 MHz (NTSC), 4 cycles per word, 16-bit (2 bytes) per word, 2 cycles per byte]
- ↑ [8-bit data bus, 2.684658 MHz (NTSC), 1 cycle per byte 8-bit data bus, 2.684658 MHz (NTSC), 1 cycle per byte]
- ↑ [16-bit data bus, 7.600489 MHz (PAL), 4 cycles per word, 16-bit (2 bytes) per word, 2 cycles per byte 16-bit data bus, 7.600489 MHz (PAL), 4 cycles per word, 16-bit (2 bytes) per word, 2 cycles per byte]
- ↑ [8-bit data bus, 2.660171 MHz (PAL), 1 cycle per byte 8-bit data bus, 2.660171 MHz (PAL), 1 cycle per byte]
- ↑ [8-bit data bus, 2.684658–3.579545 MHz (NTSC), 2.660171–3.546895 MHz (PAL), 1 cycle per byte 8-bit data bus, 2.684658–3.579545 MHz (NTSC), 2.660171–3.546895 MHz (PAL), 1 cycle per byte]
- ↑ 6.0 6.1 6.2 [Same performance for subtractions Same performance for subtractions]
- ↑ [2 cycles per 8-bit add[9] 2 cycles per 8-bit add[9]]
- ↑ [14 cycles per 8×8-bit multiply[10] 14 cycles per 8×8-bit multiply[10]]
- ↑ [8 cycles per 8×8-bit multiply[11] 8 cycles per 8×8-bit multiply[11]]
- ↑ [38 cycles per 16/8-bit divide[12] 38 cycles per 16/8-bit divide[12]]
- ↑ [19 cycles per 16/8-bit divide[5] 19 cycles per 16/8-bit divide[5]]
- ↑ [Minimum 3 cycles per 16-bit add[9] Minimum 3 cycles per 16-bit add[9]]
- ↑ [38 cycles per 16×8-bit multiply (3 cycles SEP, 7 cycles STA, 3 cycles XBA, 6 cycles STA, 6 cycles STY, 3 cycles REP, 2 cycles LDA, 2 cycles LDY, 6 cycles RTS)[13][9]
109 cycles per 16×16-bit multiply: 2× 16×8-bit multiplies (38 cycles each), 32-bit add (33 cycles)[14] 38 cycles per 16×8-bit multiply (3 cycles SEP, 7 cycles STA, 3 cycles XBA, 6 cycles STA, 6 cycles STY, 3 cycles REP, 2 cycles LDA, 2 cycles LDY, 6 cycles RTS)[13][9]
109 cycles per 16×16-bit multiply: 2× 16×8-bit multiplies (38 cycles each), 32-bit add (33 cycles)[14]] - ↑ [70 cycles per 16/16-bit divide (3 cycles STZ, 2 cycles LDY, 2 cycles ASL, 2 cycles BCS, 2 cycles INY, 2 cycles CPY, 4 cycles BNE, 7 cycles ROR, 3 cycles PHA, 2 cycles TXA, 2 cycles SEC, 7 cycles SBC, 4 cycles BCC, 2 cycles TAX, 7 cycles ROL, 4 cycles PLA, 7 cycles LSR, 2 cycles DEY, 6 cycles RTS)[15][9] 70 cycles per 16/16-bit divide (3 cycles STZ, 2 cycles LDY, 2 cycles ASL, 2 cycles BCS, 2 cycles INY, 2 cycles CPY, 4 cycles BNE, 7 cycles ROR, 3 cycles PHA, 2 cycles TXA, 2 cycles SEC, 7 cycles SBC, 4 cycles BCC, 2 cycles TAX, 7 cycles ROL, 4 cycles PLA, 7 cycles LSR, 2 cycles DEY, 6 cycles RTS)[15][9]]
- ↑ [33 cycles per 32-bit add (3 cycles REP, 2 cycles CLC, 2 cycles CLD, 8 cycles LDA ADR, 10 cycles 16-bit ADC ADR, 8 cycles STA ADR)[16][9] 33 cycles per 32-bit add (3 cycles REP, 2 cycles CLC, 2 cycles CLD, 8 cycles LDA ADR, 10 cycles 16-bit ADC ADR, 8 cycles STA ADR)[16][9]]
- ↑ [70 cycles per 32×32-bit multiply (MULU.L)[17] 70 cycles per 32×32-bit multiply (MULU.L)[17]]
- ↑ [209 cycles per 32×32-bit multiply: 2× 16×16-bit multiplies (88 cycles each), 32-bit add (33 cycles)[14] 209 cycles per 32×32-bit multiply: 2× 16×16-bit multiplies (88 cycles each), 32-bit add (33 cycles)[14]]
- ↑ [173 cycles per 32/16-bit divide: 2× 16/16-bit divides (70 cycles each), 32-bit add (33 cycles)[14] 173 cycles per 32/16-bit divide: 2× 16/16-bit divides (70 cycles each), 32-bit add (33 cycles)[14]]
- ↑ [SNES CPU polygon geometry calculations:
- 1597 cycles per vertex: 11x 16×16-bit multiplies (109 cycles each), 6x 32-bit adds (33 cycles each), 9x 16-bit adds (3 cycles each), 32/16-bit divide (173 cycles)[14] SNES CPU polygon geometry calculations:
- 1597 cycles per vertex: 11x 16×16-bit multiplies (109 cycles each), 6x 32-bit adds (33 cycles each), 9x 16-bit adds (3 cycles each), 32/16-bit divide (173 cycles)[14]]
- ↑ [SNES CPU polygon rendering:
Framebuffer rendering: 256×160 framebuffer (double-buffered, 40 KB), 15 FPS (614.4 KB/s), 819.64 kHz framebuffer DMA (1.334 kHz per KB,[25] 30 cycles setup), 30 cycles per DMA setup (4 cycles LDX, 6 cycles STX, 8 cycles LDA, 12 cycles STA)[26][9]
Polygon rendering: 1.865018 MHz (15 FPS), 4363 cycles per 8×8 pixel polygon- 1597 cycles geometry per polygon
- 496 cycles polygon rendering per polygon: 24 comparison cycles (12 comparisons,[27] 2 cycles per CPY comparison),[9] 7 assignments (6 rasterization assignments,[27] 1 flat shading assignment),[28] 218 multiply cycles (2x 16×16-bit multiplies), 132 add cycles (4x 32-bit adds), 5 broadcasts,[29] 110 cycles DMA access (40 bytes per polygon, 2 cycles per byte, 30 cycles setup)[30]
- 2270 cycles pixel rendering per 8×8 (64-pixel) polygon: 2112 add cycles (32-bit add per pixel),[31] 158 cycles DMA (1 byte per pixel, 2 cycles per pixel, 30 cycles setup) SNES CPU polygon rendering:
Framebuffer rendering: 256×160 framebuffer (double-buffered, 40 KB), 15 FPS (614.4 KB/s), 819.64 kHz framebuffer DMA (1.334 kHz per KB,[25] 30 cycles setup), 30 cycles per DMA setup (4 cycles LDX, 6 cycles STX, 8 cycles LDA, 12 cycles STA)[26][9]
Polygon rendering: 1.865018 MHz (15 FPS), 4363 cycles per 8×8 pixel polygon- 1597 cycles geometry per polygon
- 496 cycles polygon rendering per polygon: 24 comparison cycles (12 comparisons,[27] 2 cycles per CPY comparison),[9] 7 assignments (6 rasterization assignments,[27] 1 flat shading assignment),[28] 218 multiply cycles (2x 16×16-bit multiplies), 132 add cycles (4x 32-bit adds), 5 broadcasts,[29] 110 cycles DMA access (40 bytes per polygon, 2 cycles per byte, 30 cycles setup)[30]
- 2270 cycles pixel rendering per 8×8 (64-pixel) polygon: 2112 add cycles (32-bit add per pixel),[31] 158 cycles DMA (1 byte per pixel, 2 cycles per pixel, 30 cycles setup)]
- ↑ [SNES CPU texture mapping: 17.308 kHz per 8×8 texel polygon (12.945 kHz texture mapping per 8×8 texel polygon)
- 316 cycles DMA per 8×8 texel texture: 2 block moves, 2 cycles per texel (1 byte per texel), 30 cycles setup
- 12.629 kHz per 8×8 texel polygon: 73x 32/16-bit divides per polygon (173 cycles each), 1557 vertex divide cycles per polygon (9 divides per polygon), 11.072 kHz texel divides per 8×8 texel polygon (64 divides, 1 divide per texel)[32] SNES CPU texture mapping: 17.308 kHz per 8×8 texel polygon (12.945 kHz texture mapping per 8×8 texel polygon)
- 316 cycles DMA per 8×8 texel texture: 2 block moves, 2 cycles per texel (1 byte per texel), 30 cycles setup
- 12.629 kHz per 8×8 texel polygon: 73x 32/16-bit divides per polygon (173 cycles each), 1557 vertex divide cycles per polygon (9 divides per polygon), 11.072 kHz texel divides per 8×8 texel polygon (64 divides, 1 divide per texel)[32]]
- ↑ [YM2612 - 128 KB/s (4× 8-bit stereo 16 kHz samples)[42]
PSG - 22.05 KB/s (4-bit mono 44.1 kHz sample)[43] YM2612 - 128 KB/s (4× 8-bit stereo 16 kHz samples)[42]
PSG - 22.05 KB/s (4-bit mono 44.1 kHz sample)[43]] - ↑ [16-bit stereo 32 kHz sample[38] 16-bit stereo 32 kHz sample[38]]
- ↑ [3.4 microseconds per 26 cycles,[47] 2.136322× CPU clock rate 3.4 microseconds per 26 cycles,[47] 2.136322× CPU clock rate]
- ↑ [1 cycle per add[48] 1 cycle per add[48]]
- ↑ [5 cycles per 16×16 multiply[48] 5 cycles per 16×16 multiply[48]]
- ↑ [32 cycles per 16-bit divide[48] 32 cycles per 16-bit divide[48]]
- ↑ [DSP-1 geometry calculations: 3,939 cycles per polygon (80 adds, 111 multiplies, 9 divides),[52] 2.136322 cycles (1 CPU cycle) per add, 26 cycles per 16-bit multiply, 98 cycles per divide[47] DSP-1 geometry calculations: 3,939 cycles per polygon (80 adds, 111 multiplies, 9 divides),[52] 2.136322 cycles (1 CPU cycle) per add, 26 cycles per 16-bit multiply, 98 cycles per divide[47]]
- ↑ [Super FX geometry calculations: 923 cycles per polygon (80 adds, 111 multiplies, 9 divides),[52] 1 cycle per add, 5 cycles per 16×16 multiply, 32 cycles per 16-bit divide[48] Super FX geometry calculations: 923 cycles per polygon (80 adds, 111 multiplies, 9 divides),[52] 1 cycle per add, 5 cycles per 16×16 multiply, 32 cycles per 16-bit divide[48]]
- ↑ [DSP-1 assisted rendering:
- CPU framebuffer rendering: 256×192 framebuffer (double-buffered, 48 KB), 15 FPS (737.28 KB/s), 983.562 kHz CPU framebuffer DMA (1.334 kHz per KB, 30 cycles setup), 2.101205 MHz DSP-1 cycles
- Polygon rendering: 5.545854 MHz (15 FPS) DSP-1 cycles available, 5.869 kHz per 8×8 pixel polygon
- Geometry per polygon: 3,939 DSP-1 cycles
- Polygon rendering per polygon: 772 DSP-1 cycles (361 CPU cycles)
- Pixel rendering per 8×8 pixel polygon: 1,158 DSP-1 cycles (542 CPU cycles) DSP-1 assisted rendering:
- CPU framebuffer rendering: 256×192 framebuffer (double-buffered, 48 KB), 15 FPS (737.28 KB/s), 983.562 kHz CPU framebuffer DMA (1.334 kHz per KB, 30 cycles setup), 2.101205 MHz DSP-1 cycles
- Polygon rendering: 5.545854 MHz (15 FPS) DSP-1 cycles available, 5.869 kHz per 8×8 pixel polygon
- Geometry per polygon: 3,939 DSP-1 cycles
- Polygon rendering per polygon: 772 DSP-1 cycles (361 CPU cycles)
- Pixel rendering per 8×8 pixel polygon: 1,158 DSP-1 cycles (542 CPU cycles)]
- ↑ [Super FX rendering:
- Framebuffer rendering: 256×192 framebuffer (double-buffered, 48 KB), 15 FPS (737.28 KB/s), 983.562 kHz CPU framebuffer DMA (1.334 kHz per KB, 30 cycles setup), 2.950686 MHz Super FX cycles
- Polygon rendering: 7.787949 MHz (15 FPS) Super FX cycles available, 3.632 kHz per 8×8 pixel polygon
- Geometry per polygon: 923 Super FX cycles
- Polygon rendering per polygon: 1083 Super FX cycles (361 CPU cycles)
- Pixel rendering per 8×8 pixel polygon: 1626 Super FX cycles (542 CPU cycles) Super FX rendering:
- Framebuffer rendering: 256×192 framebuffer (double-buffered, 48 KB), 15 FPS (737.28 KB/s), 983.562 kHz CPU framebuffer DMA (1.334 kHz per KB, 30 cycles setup), 2.950686 MHz Super FX cycles
- Polygon rendering: 7.787949 MHz (15 FPS) Super FX cycles available, 3.632 kHz per 8×8 pixel polygon
- Geometry per polygon: 923 Super FX cycles
- Polygon rendering per polygon: 1083 Super FX cycles (361 CPU cycles)
- Pixel rendering per 8×8 pixel polygon: 1626 Super FX cycles (542 CPU cycles)]
- ↑ [DSP-1 assisted texture mapping: 11.462 kHz per 8×8 texel polygon (7.83 kHz texture mapping per 8×8 texel polygon)
- 676 DSP-1 cycles (316 CPU cycles) CPU DMA per 8×8 texel texture
- 7154 divide cycles per 8×8 texel polygon: 73 divides per 8×8 texel polygon, 882 vertex divide cycles per polygon (9 divides per polygon), 6272 texel divide cycles per 8×8 texel polygon (64 divides, 1 divide per texel) DSP-1 assisted texture mapping: 11.462 kHz per 8×8 texel polygon (7.83 kHz texture mapping per 8×8 texel polygon)
- 676 DSP-1 cycles (316 CPU cycles) CPU DMA per 8×8 texel texture
- 7154 divide cycles per 8×8 texel polygon: 73 divides per 8×8 texel polygon, 882 vertex divide cycles per polygon (9 divides per polygon), 6272 texel divide cycles per 8×8 texel polygon (64 divides, 1 divide per texel)]
- ↑ [Super FX texture mapping: 6.916 kHz per 8×8 texel polygon (3.284 kHz texture mapping per 8×8 texel polygon)
- 948 Super FX cycles (316 CPU cycles) DMA per 8×8 texel texture
- 2336 divide cycles per 8×8 texel polygon: 73 divides per 8×8 texel polygon, 288 vertex divide cycles per polygon (9 divides per polygon), 2048 texel divide cycles per 8×8 texel polygon (64 divides, 1 divide per texel) Super FX texture mapping: 6.916 kHz per 8×8 texel polygon (3.284 kHz texture mapping per 8×8 texel polygon)
- 948 Super FX cycles (316 CPU cycles) DMA per 8×8 texel texture
- 2336 divide cycles per 8×8 texel polygon: 73 divides per 8×8 texel polygon, 288 vertex divide cycles per polygon (9 divides per polygon), 2048 texel divide cycles per 8×8 texel polygon (64 divides, 1 divide per texel)]
References
- ↑ 1.0 1.1 Blast Processing 101
- ↑ 2.0 2.1 2.2 2.3 2.4 Why Are SNES and Genesis “16-bit”?
- ↑ 3.0 3.1 3.2 3.3 Sega Mega Drive/Technical specifications
- ↑ 4.0 4.1 4.2 Super Nintendo Entertainment System technical specifications
- ↑ 5.0 5.1 5.2 5.3 5.4 5.5 SNES hardware specifications
- ↑ 6.0 6.1 6.2 6.3 Sega Genesis vs Super Nintendo
- ↑ 7.0 7.1 Anomie's Register Doc
- ↑ 8.0 8.1 8.2 8.3 8.4 8.5 SGDK 1.34 Benchmark
- ↑ 9.0 9.1 9.2 9.3 9.4 9.5 9.6 SNES Development: 65816 Reference
- ↑ 68k details
- ↑ SNES Development Manual (page 2-15-1)
- ↑ 3D on the Sega Genesis is possible
- ↑ Super NES Programming: Multiplication
- ↑ 14.0 14.1 14.2 14.3 Why no SNES homebrew scene?
- ↑ Programming the 65816 Including the 6502, 65C02, and 65802
- ↑ Programming the 65816
- ↑ The University of Alabama in Huntsville
- ↑ SGDK Maths3D
- ↑ File:Sega Service Manual - Genesis II - Mega Drive II (PAL) - 001 - June 1993.pdf
- ↑ File:GenesisTechnicalOverview.pdf
- ↑ 3D math engine (SGDK)
- ↑ Interview: Lee Actor (Sterling Software Programmer)
- ↑ SNES Developer Manual (Nintendo)
- ↑ Appendix A-5 of Book I of SNES dev manual
- ↑ SNES Development: DMA & HDMA
- ↑ SNES Development: Grog's Guide to DMA and HDMA on the SNES
- ↑ 27.0 27.1 Algorithms for Parallel Polygon Rendering (pages 33-34)
- ↑ Transformation Of Rendering Algorithms For Hardware Implementation (page 53)
- ↑ Algorithms for Parallel Polygon Rendering (page 36)
- ↑ Computer Organization and Design: The Hardware/Software Interface (page C-44)
- ↑ Algorithms for Parallel Polygon Rendering (page 35)
- ↑ State of the Art in Computer Graphics: Visualization and Modeling (page 110)
- ↑ 33.0 33.1 SNES FMV
- ↑ 34.0 34.1 Near CD-quality music on Sega Mega-Drive? - Mega PCM 2
- ↑ htt (Wayback Machine: 2018-08-17 06:59)
- ↑ Obsolete Microprocessors
- ↑ File:Zilog Z80 Programmer's Reference Manual.pdf, page 33
- ↑ 38.0 38.1 38.2 16-bit stereo 32 kHz streaming success
- ↑ Sega Master System/Technical specifications
- ↑ Super NES Programming: SPC700 reference
- ↑ Bit Rate Reduction (BRR)
- ↑ 42.0 42.1 42.2 42.3 ResComp 1.5 (April 2016)
- ↑ 43.0 43.1 43.2 43.3 pcmenc: Advanced PCM encoder for 8-bit sound chips
- ↑ Mega PCM 2
- ↑ Dual PCM
- ↑ Sega Virtua Processor
- ↑ 47.0 47.1 47.2 SNES Development Manual: DSP1 Command Summary
- ↑ 48.0 48.1 48.2 48.3 48.4 48.5 Super NES Programming: Super FX tutorial
- ↑ 49.0 49.1 SHVC-1RA2B6S-01 (PCB)
- ↑ 50.0 50.1 SHVC-2QW5B-X1 (PCB)
- ↑ 51.0 51.1 KM68512LG-7 Datasheet
- ↑ 52.0 52.1 Design of Digital Systems and Devices (pages 95-97)
- ↑ 53.0 53.1 What's hot: Amiga or Sega?, Compute!, Issue 125 (January 1991), page A32
- ↑ Blitter Speed (Amiga Hardware Reference Manual)
- ↑ Before the Crash: Early Video Game History, page 173