Difference between revisions of "Sega Hikaru"

Revision as of 02:36, 19 November 2016

Sega Hikaru

Manufacturer: Sega

Release	Date	RRP	Code

The Sega Hikaru is a successor of the Sega NAOMI and Sega Model 3 arcade systems that was developed in 1998 and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's Brave Fire Fighters, in which the flame and water effects were largely a showpiece for the hardware.

It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware Phong shading, the most intensive form of shading at the time, and was capable of the most complex lighting and particle effects of its time.

It was the most powerful game system of its time (Planet Harriers in particular was regarded as having the best video game graphics at the time), but it was very expensive. Since it was comparatively expensive to produce, Sega soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the NAOMI 2, which was not as powerful, but more affordable.

Development

According to Sega in 1999:^[1]

“	Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."	„

In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999.^[2] The word "Hikaru" (ひかる) means "to shine" in Japanese.

Specifications

Board composition: Main Board, ROM Board, AICA Sound Board, I/O Board, Filter Board, Network Board^[2]
- Optional: Sound Board 2^[3]^[4]
Operating systems:
- Sega native operating system
- Custom Windows CE, with DirectX 6.0, Direct3D and OpenGL support
Extensions: communication, 4‑channel surround audio, PCI, MIDI, RS‑232C
Connection: JAMMA Video compliant, VGA

Main Processors

Main CPU: 2× Hitachi SH‑4 @ 200 MHz^[5]
- Units: 2× 128‑bit SIMD vector units with graphic functions, 2× 64‑bit floating‑point units, 2× 32‑bit fixed‑point units
- Bus width: 256‑bit (2× 128‑bit) internal, 128‑bit (2× 64‑bit) external
- Bandwidth: 6.4 GB/s internal, 3.2 GB/s external
- Fixed‑point performance: 720 MIPS
- Floating‑point performance: 2.8 GFLOPS (7 MFLOPS per 16 MB/s)
- Geometry performance: More than 20 million polygons/sec, with lighting calculations (140 FLOPS per polygon)
- Note: With Sega Custom 3D GPU, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, or additional graphical performance.
MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU (Zilog Z80)^[6]^[7] @ 14.7456 MHz^[2] (8/16‑bit instructions, 8‑bit bus, 2.14 MIPS)
Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities)^[3]^[2]^[8]
Main Board PLD: 27 units, 928‑bit (25 GB/sec) internal, 640‑bit (21 GB/sec) external^[2]^[9]
- 2× Sega PAL (Lattice GAL16V8) GAL @ 250 MHz: 16 units (2× 8 units), 128‑bit (2× 64‑bit), DMA control, graphics processing,^[10] 4 GB/sec
- Sega 315‑6083A, 315‑6085, 315‑6086 @ 250 MHz: 3 units, 384‑bit (3× 128‑bit), 12 GB/sec
- Sega 315‑6202 (Lattice CY37128) CPLD @ 167 MHz: 8 units, 416‑bit (8× 52‑bit) internal (9 GB/sec), 128‑bit (8× 16‑bit) external (3 GB/sec)^[11]
Network Board processors:^[2]
- Network CPU: Motorola 68000 @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS)^[2]
- Network PLD: FPGA @ 180 MHz (32‑bit),^[12] 3× PAL @ 40 MHz, Sega 315‑5804 CPLD @ 40 MHz
- Network processors: 2× Sega 315‑5917 @ 40 MHz
ROM Board processors:^[2]
- ROM Board PLD: FPGA @ 180 MHz (32‑bit),^[12] CPLD/PAL @ 182 MHz (32‑bit)^[13]^[14]
- Security IC: Sega 315-5881 @ 28 MHz

Sound

Sound engine: 2× Yamaha AICA Super Intelligent Sound Processor (315‑6232) @ 67 MHz
- Internal CPU: 2× 32‑bit ARM7 RISC CPU @ 45 MHz
- CPU performance: 34 MIPS (2× 17 MIPS)
- PCM/ADPCM: 16‑bit depth, 48 kHz sampling rate (DVD quality), 128 channels
- Bus width: 32‑bit (2× 16‑bit)
- Other features: DSP, sound synthesizer

Graphics

The Sega Hikaru uses custom 3D graphics hardware, which include the following specifications:^[15]^[16]^[3]

Graphics Engine GPU: Sega Custom 3D GPU @ 250 MHz
- Core units: 7 processors
GPU core processors: 7 processors^[2]^[9]
- 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250 MHz: 512‑bit (2× 256‑bit), Geometry Processor
- Sega GPU 1A Image Generator (315‑6087) @ 250 MHz: 128‑bit, rasterizer/renderer^[17]
- 2× Sega GPU DMA controllers (315‑6084) @ 250 MHz: 256‑bit (2× 128‑bit)
- 2× Analog Devices ADV7120 Video DAC @ 80 MHz: 48‑bit (2× 24‑bit)^[18]
GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
- Hardware T&L: Transform, clipping, lighting
- Materials: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, unlit
- Fog: Color, transparency, density, depth blend, translucency
- Rendering: Double‑buffered 3D rendering (odd & even frames), depth cueing, depth buffer, depth bias, face culling, static meshes, dynamic meshes
- Shading: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, linear
- Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,^[19] modelview stack
- Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 LOD levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets)
GPU DMA controllers: 2× Sega GPU DMA controllers
- GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
- DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
Color depth: 32‑bit ARGB, 16,777,216 colors (24‑bit color) with 8‑bit (256 levels) alpha blending, YUV and RGB color space, color key overlay
Display resolution: 31 kHz horizontal sync, 60 Hz refresh rate, 80 MHz Video DAC, JAMMA/VGA output, progressive scan^[2]^[18]
- Single monitor display: 496×384 to 800×608 (default 640×480)
- Dual monitor display: 992×384 to 1600×608 (default 1280×480)
- Video output: 496×384 to 1968×1080 (default 640×480)
- Framebuffer: 496×384 to 2048×2048 (default 2048×2048)^[2]
Lighting: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
- Light types: Diffuse, ambient, specular, horizontal, spot
- Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
- Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
GPU capabilities: 2 bitmap layers, calendar, 16,384 vertices per mesh,^[20] hidden surface removal, deferred rendering
- Framebuffer: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (double‑buffering), accessible by DMA controller
- Effects: Stencil, shadows, motion blur, particle effects, fire effects, water effects,^[1] fog, alpha blending, anti‑aliasing, specular effects,^[21]
- Features: Tiled rendering, deferred rendering, back‑face culling, hidden surface removal
- Phong shading: Per‑pixel lighting/shading computation processed by rasterization pipeline,^[22] deferred rendering prevents shading of overdrawn pixels to maximize rendering bandwidth,^[23] all compute units could be used as shader units to maximize Phong shading performance
Texture capabilities: 16×16 to 512×512 texture sizes, mipmapping, mipmap trees, texture panning, multi‑texturing, bump mapping, normal mapping, texture filtering, bilinear filtering, trilinear filtering, environment mapping^[21]
- Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
Floating-point performance: 32.678 GFLOPS^{[n 1]}
Phong shading performance:
- 2 million polygons/sec: 4 lights/polygon, 100-pixel polygons^{[n 2]}
- 20 million polygons/sec: 1 light/polygon, 32-pixel polygons^{[n 3]}

Memory

Memory: Up to 465 MB^[2]
- Main memory: 130 MB (64 MB RAM, 66 MB ROM)
- Video memory: 286.25 MB (30.25 MB RAM, 256 MB ROM)
- Sound memory: 48 MB (16 MB RAM, 32 MB ROM)
- Other memory: 480 KB (384 KB RAM, 96 KB cache)
RAM: 110.625 MB^[8]^[2]
- Main RAM: 64 MB SDRAM^[26] (32 MB per SH‑4)
- VRAM: 30.25 MB^[27]^[15]
  - 4 MB Command RAM (2× 315‑6197)
  - 8 MB texture banks (2× 315‑6084)
  - 8 MB framebuffer SDRAM (IC 44‑47)
  - 10 MB other SDRAM (1 MB Geometry Processor, 1 MB Image Generator)
  - 256 KB Synchronous SRAM^[28]
- Sound RAM: 16 MB SDRAM (8 MB per AICA)
- Other Main Board RAM: 128 KB SRAM^[29]
  - MIE RAM: 64 KB^[6]
  - Backup RAM: 64 KB
- Network Board RAM: 192 KB SRAM^[29]
- ROM Board RAM: 64 KB SRAM^[30]
ROM: Up to 354 MB
- Boot ROM: 2 MB EPROM^[2]
- Game ROM Board: Up to 352 MB (64 MB main ROM, 256 MB video MaskROM,^[31] 32 MB sound ROM)^[3]
- Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board.^[32]
Cache: 96 KB (48 KB per SH‑4 CPU)^[33]

Bandwidth

Internal processor bandwidth:^[2]
- SH‑4 cache: 6.4 GB/s (256‑bit, 200 MHz)
- Sega Custom 3D GPU: 28.48 GB/s (944‑bit)
  - CP: 16 GB/s (512‑bit, 250 MHz)
  - Image Generator: 4 GB/s (128‑bit, 250 MHz)
  - Texture DMA controllers: 8 GB/s (256‑bit, 250 MHz)
  - DAC: 480 MB/s (48‑bit, 80 MHz)^[18]
- AICA Sound Processor: 536 MB/s (2× 32‑bit, 67 MHz)
- Z80 MIE MCU: 15 MB/s (8‑bit, 14.7456 MHz)
- 315‑6154 Memory Controllers: 1.6 GB/s (64‑bit, 200 MHz)
- Main Board PLD: 25 GB/sec (928‑bit, 250 MHz)
- ROM Board PLD: 1.45 GB/s (2× 32‑bit, 180/182 MHz)
- Network Board 68000: 80 MB/s (16‑bit, 40 MHz)
- Network Board FPGA: 720 MB/s (32‑bit, 180 MHz)^[12]
RAM bandwidth: 35.111 GB/s^[2]
- Main RAM: 2.4 GB/s (192‑bit, 100 MHz, 6 ns)^[26]
  - SH‑4: 1.6 GB/s (128‑bit)
  - Memory Controllers: 800 MB/s (64‑bit)
- VRAM: 32 GB/s (1088‑bit, 4.5 ns)
  - 315‑6197 Command RAM: 16 GB/s (512‑bit, 250 MHz)
  - 315‑6084 texture banks: 8 GB/s (256‑bit, 250 MHz)
  - SDRAM: 7.2 GB/s (9× 32‑bit, 200 MHz, 4.5 ns)^[27]
  - Synchronous SRAM: 400 MB/s (32‑bit, 100 MHz, 5 ns)^[28]
- Sound RAM: 268 MB/s (32‑bit, 67 MHz, 6 ns)^[34]
- HM62256 SRAM: 193 MB/s (72‑bit, 45 ns)^[29]
  - MIE RAM: 15 MB/s (8‑bit, 14.7456 MHz)
  - Backup RAM: 44.444444 MB/s (16‑bit, 22.222222 MHz)
  - Network Board RAM: 133.333333 MB/s (48‑bit, 22.222222 MHz)
- ROM Board RAM: 250 MB/s (16‑bit, 125 MHz, 8 ns)^[30]
ROM bandwidth: 4 GB/s^[2]
- Boot ROM: 800 MB/s (64‑bit, 100 MHz)^[35]
- ROM Board PLD: 1.45 GB/s (2× 32‑bit, 180/182 MHz)^[12]^[13]^[14]
- ROM Board Connectors: 1.5 GB/s (2× 32‑bit, 182 MHz)

Hardware Images

Main PCB board
Sound board
Comm board
ROM board (left side)
ROM board (right side)
Main board (Up Left view)
Main board (Up Right view)
Main board (Down Left view)
Main board (Down Right view)
Custom board A
Custom board B
Outer Case
Inside, assembled

List of Games

Brave FireFighters (1999)
NASCAR Arcade (2000)
Planet Harriers (2000)
Star Wars Racer Arcade (2000)
Air Trix (2001)
Cyber Troopers Virtual-On Force (2001)
Cyber Troopers Virtual-On Force Ver.7.7 (2002)

References

↑ ^1.0 ^1.1 Sega Confirms Hikaru Does Exist (November 24, 1999)
↑ ^2.00 ^2.01 ^2.02 ^2.03 ^2.04 ^2.05 ^2.06 ^2.07 ^2.08 ^2.09 ^2.10 ^2.11 ^2.12 ^2.13 ^2.14 ^2.15 ^2.16 Sega Hikaru (MAME)
↑ ^3.0 ^3.1 ^3.2 ^3.3 Sega Hikaru Memory Controller (Valkyrie)
↑ Sega Hikaru AICA Sound Boards (Valkyrie)
↑ File:SH-4 Software Manual.pdf
↑ ^6.0 ^6.1 Sega Hikaru MIE (Valkyrie)
↑ Demul 0.56 (1 September 2010)
↑ ^8.0 ^8.1 Sega Hikaru (Valkyrie)
↑ ^9.0 ^9.1 File:Hikaru rombd upright.jpg
↑ File:GAL16V8 datasheet.pdf
↑ File:CY37 datasheet.pdf
↑ ^12.0 ^12.1 ^12.2 ^12.3 File:PLSI2032 datasheet.pdf
↑ ^13.0 ^13.1 File:M4A3 datasheet.pdf
↑ ^14.0 ^14.1 File:MACH111 datasheet.pdf
↑ ^15.0 ^15.1 Sega Hikaru GPU (Valkyrie)
↑ Sega Hikaru GPU CP (Valkyrie)
↑ Sega Hikaru Renderer (Valkyrie)
↑ ^18.0 ^18.1 ^18.2 File:ADV7120 datasheet.pdf
↑ Instanced Rendering
↑ Sega Hikaru GPU Private (Valkyrie)
↑ ^21.0 ^21.1 File:NAOMI 1998 Press Release JP.pdf
↑ Computer Graphics: Principles and Practice (Page 871)
↑ Computer Graphics: Principles and Practice (Page 900)
↑ ^24.0 ^24.1 Design of Digital Systems and Devices (pages 95-97)
↑ ^25.0 ^25.1 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)
↑ ^26.0 ^26.1 File:HM5264 datasheet.pdf
↑ ^27.0 ^27.1 File:HY57V161610D datasheet.pdf
↑ ^28.0 ^28.1 File:UPD432232 datasheet.pdf
↑ ^29.0 ^29.1 ^29.2 File:HM62256B datasheet.pdf
↑ ^30.0 ^30.1 File:CY7C199 datasheet.pdf
↑ Planet Harriers (MAME)
↑ Hideki Sato Sega Interview (Edge)
↑ File:SH-4 32-bit CPU Core Architecture.pdf
↑ File:K4S641632 datasheet.pdf
↑ File:CY2292 datasheet.pdf

Sega arcade boards
Originating in arcades
77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 VIC Dual G80 Zaxxon VCO Object System 1 LaserDisc Appoooh Hang-On System 2 System 16 OutRun Gigas X Board Y Board System 24 System 18 System 32 Model 1 Model 2 H1 Board Model 3
Console-based hardware
84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 SG-1000 System E System C Mega-Tech System Mega Play Sega Titan Video NAOMI Hikaru NAOMI 2 Atomiswave System SP Chihiro Triforce
PC-based hardware
05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Lindbergh Europa-R RingEdge RingWide RingEdge 2 Nu Nu 1.1 Nu 2 ALLS

Cite error: <ref> tags exist for a group named "n", but no corresponding <references group="n"/> tag was found, or a closing </ref> is missing

[.5Bhttp:.2F.2Fwww.goodcowfilms.com.2Ffarm.2Fgames.2Fnews-archive.2FSega.2520Confirms.2520Hikaru.2520DOES.2520Exist....htm_Sega_Confirms_Hikaru_Does_Exist_.28November_24.2C_1999.29.5D-1] 1.0 ^1.1 Sega Confirms Hikaru Does Exist (November 24, 1999)

[.5Bhttps:.2F.2Fgithub.com.2Fmamedev.2Fmame.2Fblob.2Fmaster.2Fsrc.2Fmame.2Fdrivers.2Fhikaru.cpp_Sega_Hikaru_.28MAME.29.5D-2] 2.00 ^2.01 ^2.02 ^2.03 ^2.04 ^2.05 ^2.06 ^2.07 ^2.08 ^2.09 ^2.10 ^2.11 ^2.12 ^2.13 ^2.14 ^2.15 ^2.16 Sega Hikaru (MAME)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-memctl.c_Sega_Hikaru_Memory_Controller_.28Valkyrie.29.5D-3] 3.0 ^3.1 ^3.2 ^3.3 Sega Hikaru Memory Controller (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-aica.c_Sega_Hikaru_AICA_Sound_Boards_.28Valkyrie.29.5D-4] Sega Hikaru AICA Sound Boards (Valkyrie)

[:File:SH-4_Software_Manual.pdf_p-5] File:SH-4 Software Manual.pdf

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-mie.c_Sega_Hikaru_MIE_.28Valkyrie.29.5D-6] 6.0 ^6.1 Sega Hikaru MIE (Valkyrie)

[.5Bhttp:.2F.2Fdemul.emulation64.com_Demul_0.56_.281_September_2010.29.5D-7] Demul 0.56 (1 September 2010)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru.c_Sega_Hikaru_.28Valkyrie.29.5D-8] 8.0 ^8.1 Sega Hikaru (Valkyrie)

[:File:Hikaru_rombd_upright.jpg_p-9] 9.0 ^9.1 File:Hikaru rombd upright.jpg

[:File:GAL16V8_datasheet.pdf_p-10] File:GAL16V8 datasheet.pdf

[:File:CY37_datasheet.pdf_p-11] File:CY37 datasheet.pdf

[:File:PLSI2032_datasheet.pdf_p-12] 12.0 ^12.1 ^12.2 ^12.3 File:PLSI2032 datasheet.pdf

[:File:M4A3_datasheet.pdf_p-13] 13.0 ^13.1 File:M4A3 datasheet.pdf

[:File:MACH111_datasheet.pdf_p-14] 14.0 ^14.1 File:MACH111 datasheet.pdf

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu.c_Sega_Hikaru_GPU_.28Valkyrie.29.5D-15] 15.0 ^15.1 Sega Hikaru GPU (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu-cp.c_Sega_Hikaru_GPU_CP_.28Valkyrie.29.5D-16] Sega Hikaru GPU CP (Valkyrie)

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-renderer.c_Sega_Hikaru_Renderer_.28Valkyrie.29.5D-17] Sega Hikaru Renderer (Valkyrie)

[:File:ADV7120_datasheet.pdf_p-18] 18.0 ^18.1 ^18.2 File:ADV7120 datasheet.pdf

[.5Bhttp:.2F.2Fogldev.atspace.co.uk.2Fwww.2Ftutorial33.2Ftutorial33.html_Instanced_Rendering.5D-19] Instanced Rendering

[.5Bhttps:.2F.2Fgithub.com.2Fstefanoteso.2Fvalkyrie.2Fblob.2Fmaster.2Fsrc.2Fmach.2Fhikaru.2Fhikaru-gpu-private.h_Sega_Hikaru_GPU_Private_.28Valkyrie.29.5D-20] Sega Hikaru GPU Private (Valkyrie)

[:File:NAOMI_1998_Press_Release_JP.pdf_p-21] 21.0 ^21.1 File:NAOMI 1998 Press Release JP.pdf

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3D-4ngT05gmAQC.26pg.3DPA871_Computer_Graphics:_Principles_and_Practice_.28Page_871.29.5D-22] Computer Graphics: Principles and Practice (Page 871)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3D-4ngT05gmAQC.26pg.3DPA900_Computer_Graphics:_Principles_and_Practice_.28Page_900.29.5D-23] Computer Graphics: Principles and Practice (Page 900)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DiAvHt5RCHbMC.26pg.3DPA95_.27.27Design_of_Digital_Systems_and_Devices.27.27_.28pages_95-97.29.5D-25] 24.0 ^24.1 Design of Digital Systems and Devices (pages 95-97)

[.5Bhttps:.2F.2Fbooks.google.co.uk.2Fbooks.3Fid.3DKQnejL0ivfQC.26pg.3DPA78_Computer_Vision_and_Graphics:_International_Conference.2C_ICCVG_2004.2C_Warsaw.2C_Poland.2C_September_2004.2C_Proceedings_.28Page_78.29.5D-26] 25.0 ^25.1 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)

[:File:HM5264_datasheet.pdf_p-29] 26.0 ^26.1 File:HM5264 datasheet.pdf

[:File:HY57V161610D_datasheet.pdf_p-30] 27.0 ^27.1 File:HY57V161610D datasheet.pdf

[:File:UPD432232_datasheet.pdf_p-31] 28.0 ^28.1 File:UPD432232 datasheet.pdf

[:File:HM62256B_datasheet.pdf_p-32] 29.0 ^29.1 ^29.2 File:HM62256B datasheet.pdf

[:File:CY7C199_datasheet.pdf_p-33] 30.0 ^30.1 File:CY7C199 datasheet.pdf

[.5Bhttp:.2F.2Fwww.mamedb.com.2Fgame.2Fpharrier_Planet_Harriers_.28MAME.29.5D-34] Planet Harriers (MAME)

[.5Bhttp:.2F.2Ffarm6.staticflickr.com.2F5471.2F12172411045_18bfc5912f_c.jpg_Hideki_Sato_Sega_Interview_.28Edge.29.5D-35] Hideki Sato Sega Interview (Edge)

[:File:SH-4_32-bit_CPU_Core_Architecture.pdf_p-36] File:SH-4 32-bit CPU Core Architecture.pdf

[:File:K4S641632_datasheet.pdf_p-37] File:K4S641632 datasheet.pdf

[:File:CY2292_datasheet.pdf_p-38] File:CY2292 datasheet.pdf

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@@ Line 51: / Line 51: @@
 * MIE bridge MCU: Sega 315‑6146 Maple‑JVS MCU ([[Zilog]] [[Z80]]){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c Sega Hikaru MIE (Valkyrie)]}}{{ref|[http://demul.emulation64.com Demul 0.56 (1 September 2010)]}} @ 14.7456&nbsp;MHz{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}} (8/16‑bit instructions, 8‑bit bus, 2.14&nbsp;MIPS)
 * Memory controllers: 2× Sega 315‑6154 Memory Controller  @ 200&nbsp;MHz (2× 32‑bit, DMA capabilities){{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c Sega Hikaru Memory Controller (Valkyrie)]}}{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c Sega Hikaru (Valkyrie)]}}
+* Main Board [[wikipedia:Programmable logic device|PLD]]: 27&nbsp;units, 928‑bit (25&nbsp;GB/sec) internal, 640‑bit (21&nbsp;GB/sec) external{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
+** 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250&nbsp;MHz: 16&nbsp;units (2×&nbsp;8&nbsp;units), 128‑bit (2×&nbsp;64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4&nbsp;GB/sec
+** Sega 315‑6083A, 315‑6085, 315‑6086 @ 250&nbsp;MHz: 3&nbsp;units, 384‑bit (3×&nbsp;128‑bit), 12&nbsp;GB/sec
+** Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167&nbsp;MHz: 8&nbsp;units, 416‑bit (8×&nbsp;52‑bit) internal (9&nbsp;GB/sec), 128‑bit (8× 16‑bit) external (3&nbsp;GB/sec){{fileref|CY37 datasheet.pdf}}
 * Network Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 ** Network CPU: [[Motorola 68000]] @ 40&nbsp;MHz (16/32‑bit instructions, 16‑bit bus, 7&nbsp;MIPS){{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
-** Network [[wikipedia:Programmable logic device|PLD]]: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40&nbsp;MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40&nbsp;MHz
+** Network PLD: [[wikipedia:Field-programmable gate array|FPGA]] @ 180&nbsp;MHz (32‑bit),{{fileref|PLSI2032 datasheet.pdf}} 3× [[wikipedia:Programmable Array Logic|PAL]] @ 40&nbsp;MHz, Sega 315‑5804 [[wikipedia:Complex programmable logic device|CPLD]] @ 40&nbsp;MHz
 ** Network processors: 2× Sega 315‑5917 @ 40&nbsp;MHz
 * ROM Board processors:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
@@ Line 75: / Line 79: @@
 {{multicol|
 * Graphics Engine GPU: [[Sega]] Custom 3D GPU @ 250&nbsp;MHz
-** Core units: 34&nbsp;units (7&nbsp;processors, 27 compute units)
+** Core units: 7&nbsp;processors
-** [[#Bandwidth|Bus width]]: 1872‑bit internal, 1088‑bit external
-** Clock cycles: 7.5&nbsp;billion cycles/sec <small>(24×&nbsp;250&nbsp;MHz, 8×&nbsp;167&nbsp;MHz, 2×&nbsp;80&nbsp;MHz)</small>
 * GPU core processors: 7&nbsp;processors{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
 ** 2× Sega GPU 15 CP Command Processors (315‑6197) @ 250&nbsp;MHz: 512‑bit (2×&nbsp;256‑bit), Geometry Processor
 ** Sega GPU 1A Image Generator (315‑6087) @ 250&nbsp;MHz: 128‑bit, rasterizer/renderer{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c Sega Hikaru Renderer (Valkyrie)]}}
-** 2× Sega GPU DMA controllers (315‑6084) @ 250&nbsp;MHz: 256‑bit (2×&nbsp;128‑bit), texture processors
+** 2× Sega GPU DMA controllers (315‑6084) @ 250&nbsp;MHz: 256‑bit (2×&nbsp;128‑bit)
 ** 2× Analog Devices ADV7120 Video [[wikipedia:Digital-to-analog converter|DAC]] @ 80&nbsp;MHz: 48‑bit (2×&nbsp;24‑bit){{fileref|ADV7120 datasheet.pdf}}
-* GPU compute units: 27&nbsp;units, 928‑bit (25&nbsp;GB/sec) internal, 640‑bit (21&nbsp;GB/sec) external{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|Hikaru rombd upright.jpg}}
-** 2× Sega PAL (Lattice GAL16V8) [[wikipedia:Generic array logic|GAL]] @ 250&nbsp;MHz: 16&nbsp;units (2×&nbsp;8&nbsp;units), 128‑bit (2×&nbsp;64‑bit), DMA control, graphics processing,{{fileref|GAL16V8 datasheet.pdf}} 4&nbsp;GB/sec
-** Sega 315‑6083A, 315‑6085, 315‑6086 @ 250&nbsp;MHz: 3&nbsp;units, 384‑bit (3×&nbsp;128‑bit), 12&nbsp;GB/sec
-** Sega 315‑6202 (Lattice CY37128) [[wikipedia:Complex programmable logic device|CPLD]] @ 167&nbsp;MHz: 8&nbsp;units, 416‑bit (8×&nbsp;52‑bit) internal (9&nbsp;GB/sec), 128‑bit (8× 16‑bit) external (3&nbsp;GB/sec){{fileref|CY37 datasheet.pdf}}
-** Note: Compute units could be used as T&L geometry coprocessors (processing polygons, clipping, lighting) or render/shader units (rendering, texturing, shading).
 * GPU Geometry Processors: 2× Sega GPU 15 CP Command Processors
 ** Hardware T&L: Transform, clipping, lighting
@@ Line 96: / Line 93: @@
 ** Modelview matrix: Instanced drawing, multiple instances, shared attributes between models,{{ref|[http://ogldev.atspace.co.uk/www/tutorial33/tutorial33.html Instanced Rendering]}} modelview stack
 ** Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 [[wikipedia:Level of detail|LOD]] levels), 16,384 textures/texheads (256 LOD levels), 1024&nbsp;lights (256 light sets)
-* GPU texture processors: 2× Sega GPU [[wikipedia:Direct memory access|DMA]] controllers
+* GPU [[wikipedia:Direct memory access|DMA]] controllers: 2× Sega GPU DMA controllers
 ** GPU IDMA (Indirect DMA) controller: Loads texture data from MaskROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
 ** DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
-** Texture banks: 2 texture banks (stored as 2×&nbsp;2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
-** Texturing capabilities: 16×16 to 512×512 texture sizes, [[wikipedia:Mipmap|mipmapping]], mipmap trees, texture panning, multi‑texturing, [[wikipedia:Bump mapping|bump mapping]], [[wikipedia:Normal mapping|normal mapping]], texture filtering, bilinear filtering, trilinear filtering, [[wikipedia:Reflection mapping|environment mapping]]{{fileref|NAOMI 1998 Press Release JP.pdf}}
 * [[Palette|Color depth]]: [[wikipedia:32-bit color|32‑bit]] [[wikipedia:RGBA color space|ARGB]], 16,777,216 colors ([[wikipedia:24-bit color|24‑bit color]]) with 8‑bit (256 levels) [[wikipedia:Alpha compositing|alpha blending]], [[wikipedia:YUV|YUV]] and RGB color space, [[wikipedia:Chroma key|color key]] overlay
 * Display [[resolution]]: 31&nbsp;kHz [[wikipedia:Horizontal scan rate|horizontal sync]], 60&nbsp;Hz [[wikipedia:Refresh rate|refresh rate]], 80&nbsp;MHz Video DAC, [[JAMMA Show|JAMMA]]/[[Dreamcast VGA Adapter|VGA]] output, [[wikipedia:Progressive scan|progressive scan]]{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}{{fileref|ADV7120 datasheet.pdf}}
@@ Line 115: / Line 110: @@
 ** Effects: [[wikipedia:Stencil buffer|Stencil]], shadows, motion blur, particle effects, fire effects, [[wikipedia:Fluid simulation|water effects]],{{ref|[http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm Sega Confirms Hikaru Does Exist (November 24, 1999)]}} fog, alpha blending, anti‑aliasing, specular effects,{{fileref|NAOMI 1998 Press Release JP.pdf}}
 ** Features: [[wikipedia:Tiled rendering|Tiled rendering]], [[wikipedia:Deferred shading|deferred rendering]], [[wikipedia:Back-face culling|back‑face culling]], [[wikipedia:Hidden surface determination|hidden surface removal]]
-* [[wikia:gaming:Transform, clipping, and lighting|T&L]] [[wikipedia:Geometry pipelines|geometry pipeline]]:{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-cp.c Sega Hikaru GPU CP (Valkyrie)]}}
-** Geometry [[#Bandwidth|bandwidth]]: 22.4–47.4 GB/s <small>(16&nbsp;GB/s CP, 6.4&nbsp;GB/s SH‑4 SIMD, 25&nbsp;GB/s compute units)</small>
-** Floating‑point operations: 10–21 GFLOPS <small>(7&nbsp;GFLOPS per 16&nbsp;GB/s)</small>
-* [[wikipedia:Rasterisation|Rasterization]] [[wikipedia:Graphics pipeline|pipeline]]:
-** [[wikipedia:Render output unit|Render]]/[[wikipedia:Shader|Shader]] units: 5–32 units <small>(Image Generator, 2&nbsp;DMA controllers, 2&nbsp;DAC, 27&nbsp;compute units)</small>
-** Rendering bandwidth: 12.5–37.5 GB/s <small>(4&nbsp;GB/s Image Generator, 8&nbsp;GB/s DMA controllers, 480&nbsp;MB/s DAC, 25&nbsp;GB/s compute units)</small>
-** Raster operations: 12.5–37.5 billion [http://web.siat.ac.cn/~baoquan/papers/texvol.pdf 8‑bit] operations/sec, 6.3–19 billion 16‑bit operations/sec, 3.13–9.4 billion 32‑bit operations/sec
 ** [[wikipedia:Phong shading|Phong shading]]: Per‑pixel lighting/shading computation processed by rasterization pipeline,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 Computer Graphics: Principles and Practice (Page 871)]}} deferred rendering prevents shading of overdrawn [[pixel]]s to maximize rendering bandwidth,{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA900 Computer Graphics: Principles and Practice (Page 900)]}} all compute units could be used as shader units to maximize Phong shading performance
-* Rendering [[fillrate]]:
+* Texture capabilities: 16×16 to 512×512 texture sizes, [[wikipedia:Mipmap|mipmapping]], mipmap trees, texture panning, multi‑texturing, [[wikipedia:Bump mapping|bump mapping]], [[wikipedia:Normal mapping|normal mapping]], texture filtering, bilinear filtering, trilinear filtering, [[wikipedia:Reflection mapping|environment mapping]]{{fileref|NAOMI 1998 Press Release JP.pdf}}
-** Flat shading: 3–9 [[Pixel|GPixels/s]], 3–9 [[Texel|GTexels/s]] <small>(1&nbsp;operation per pixel)</small>
+** Texture banks: 2 texture banks (stored as 2×&nbsp;2048×1024 sheets), stores textures from MaskROM (with 16‑byte metadata per texture in Command RAM)
-** Gouraud shading: 2–4 GPixels/s, 2–4 GTexels/s <small>(1–3 operations per pixel)</small>{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA871 Computer Graphics: Principles and Practice (Page 871)]}}
+* Floating-point performance: 32.678 GFLOPS{{ref|2 million polygons/sec, 4 lights/polygon, 16.339 kFLOPS per 100-pixel polygon, 32.678 GFLOPS|group=n}}
-** Phong shading: 241–962 [[Pixel|MPixels/s]], 238–949 [[Texel|MTexels/s]] <small>(39&nbsp;operations per pixel,{{ref|1=[https://books.google.co.uk/books?id=IpIQev3ZdE0C&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}} overdrawn pixels not shaded)</small>
+* Phong shading performance:
-* Geometry performance: 350&nbsp;million vertices/sec <small>(60&nbsp;FLOPS per vertex)</small>{{ref|1=[https://books.google.co.uk/books?id=-4ngT05gmAQC&pg=PA868 Computer Graphics: Principles and Practice (Page 868)]}}
+** 2 million polygons/sec: 4 lights/polygon, 100-pixel polygons{{ref|16.339 kFLOPS per 100-pixel polygon, 32.678 GFLOPS
-* Flat‑shaded polygons: 21&nbsp;GFLOPS geometry, 3&nbsp;render/shader units
+*T&L: 543 FLOPS per polygon (339 FLOPS transformation, 204 FLOPS lighting){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
-** 162&nbsp;million polygons/sec <small>([[Sega NAOMI 2#Graphics|130&nbsp;FLOPS]] per polygon)</small>
+*Shading: 15.796 kFLOPS per 100-pixel polygon (196 FLOPS per polygon, 156 FLOPS per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
-** 141&nbsp;million polygons/sec: 1&nbsp;light, textures <small>(149&nbsp;FLOPS per polygon)</small>{{ref|[http://www.segatech.com/gamecube/overview/ Floating-Point Calculations]}}
+** 20 million polygons/sec: 1 light/polygon, 32-pixel polygons{{ref|1.561 kFLOPS per 32-pixel polygon, 32.762 GFLOPS
-* Gouraud‑shaded polygons: 21&nbsp;GFLOPS geometry, 3&nbsp;render/shader units{{ref|[http://www.segatech.com/gamecube/overview/ Floating-Point Calculations]}}
+*T&L: 264 FLOPS per polygon (213 FLOPS transformation, 51 FLOPS lighting){{ref|1=[https://books.google.co.uk/books?id=iAvHt5RCHbMC&pg=PA95 ''Design of Digital Systems and Devices'' (pages 95-97)]}}
-** 97&nbsp;million polygons/sec: 1&nbsp;light <small>(216&nbsp;FLOPS per polygon)</small>
+*Shading: 1.297 kFLOPS per 32-pixel polygon (49 FLOPS per polygon, 39 FLOPS per pixel){{ref|1=[https://books.google.co.uk/books?id=KQnejL0ivfQC&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}|group=n}}
-** 22&nbsp;million polygons/sec: 1024&nbsp;lights, textures <small>(987&nbsp;FLOPS per polygon)</small>{{ref|[https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-cp.c Sega Hikaru GPU CP (Valkyrie)]}}
-** 12&nbsp;million polygons/sec: 1024&nbsp;lights, textures, bump&nbsp;mapping <small>(1.8&nbsp;kFLOPS per polygon)</small>{{fileref|PowerVR2DCFeaturesUnderWindowsCE.pdf}}
-* Phong‑shaded polygons: 10&nbsp;GFLOPS geometry, 30&nbsp;render/shader units, 10–6000 shaded pixels per polygon{{ref|1=[https://books.google.co.uk/books?id=IpIQev3ZdE0C&pg=PA78 Computer Vision and Graphics: International Conference, ICCVG 2004, Warsaw, Poland, September 2004, Proceedings (Page 78)]}}
-** 38&nbsp;million polygons/sec: 1&nbsp;light <small>(265&nbsp;FLOPS per polygon)</small>
-** 10&nbsp;million polygons/sec: 1024&nbsp;lights, textures <small>(1&nbsp;kFLOPS per polygon)</small>
-** 5&nbsp;million polygons/sec: 1024&nbsp;lights, textures, bump&nbsp;mapping <small>(2&nbsp;kFLOPS per polygon)</small>
 }}
@@ Line 173: / Line 155: @@
 * Internal processor bandwidth:{{ref|[https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp Sega Hikaru (MAME)]}}
 ** SH‑4 cache: 6.4&nbsp;GB/s <small>(256‑bit, 200&nbsp;MHz)</small>
-** Sega Custom 3D GPU: 49.5&nbsp;GB/s (1872‑bit)
+** Sega Custom 3D GPU: 28.48&nbsp;GB/s (944‑bit)
 *** CP: 16&nbsp;GB/s <small>(512‑bit, 250&nbsp;MHz)</small>
 *** Image Generator: 4&nbsp;GB/s <small>(128‑bit, 250&nbsp;MHz)</small>
 *** Texture DMA controllers: 8&nbsp;GB/s <small>(256‑bit, 250&nbsp;MHz)</small>
 *** DAC: 480&nbsp;MB/s <small>(48‑bit, 80&nbsp;MHz)</small>{{fileref|ADV7120 datasheet.pdf}}
-*** [[#Graphics|Compute units]]: 25&nbsp;GB/sec <small>(928‑bit, 250&nbsp;MHz)</small>
 ** AICA Sound Processor: 536&nbsp;MB/s <small>(2×&nbsp;32‑bit, 67&nbsp;MHz)</small>
 ** Z80 MIE MCU: 15&nbsp;MB/s <small>(8‑bit, 14.7456&nbsp;MHz)</small>
 ** 315‑6154 Memory Controllers: 1.6&nbsp;GB/s <small>(64‑bit, 200&nbsp;MHz)</small>
+** Main Board PLD: 25&nbsp;GB/sec <small>(928‑bit, 250&nbsp;MHz)</small>
 ** ROM Board PLD: 1.45&nbsp;GB/s <small>(2×&nbsp;32‑bit, 180/182&nbsp;MHz)</small>
 ** Network Board 68000: 80&nbsp;MB/s <small>(16‑bit, 40&nbsp;MHz)</small>