Sega Hikaru

From Sega Retro

Hikaru mainPCB.jpg
Sega Hikaru
Manufacturer: Sega
Release Date RRP Code

The Sega Hikaru is a successor of the Sega NAOMI and Sega Model 3 arcade systems that was developed in 1998 and debuted in 1999. The Hikaru was used for a handful of deluxe dedicated-cabinet games, beginning with 1999's Brave Fire Fighters, in which the flame and water effects were largely a showpiece for the hardware.

It was significantly more powerful and expensive than the NAOMI. The Hikaru featured a custom Sega GPU with advanced graphical capabilities, additional CPU and sound processors, various custom processors, increased memory, and faster bandwidth. It was the first game platform capable of effective hardware Phong shading and was capable of the most complex lighting and particle effects of its time.

It was the most powerful game system of its time, but very expensive. Since it was comparatively expensive to produce, Sega soon abandoned the Hikaru in favor of continued NAOMI development. It was succeeded by the NAOMI 2, which was not as powerful, but more affordable.

Development

According to Sega in 1999: [1]


Brave Firefighters utilizes a slightly modified Naomi Hardware system called Hikaru. Hikaru incorporates a custom Sega graphics chip and possesses larger memory capacity then standard Naomi systems. "These modifications were necessary because in Brave Firefighters, our engineers were faced with the daunting challenge of creating 3d images of flames and sprayed water," stated Sega's Vice President of Sales and Marketing, Barbara Joyiens. "If you stop and think about it, both have an almost infinite number of shapes, sizes, colors, levels of opaqueness, shadings and shadows. And, when you combine the two by simulating the spraying of water on a flame, you create an entirely different set of challenges for our game designers and engineers to overcome; challenges that would be extremely difficult, if not impossible to overcome utilizing existing 3D computers. Hikaru has the horsepower to handle these demanding graphic challenges with clarity, depth and precision."


In addition, the Hikaru also uses two Hitachi SH-4 CPU processors, two Yamaha AICA sound engine processors, a Motorola 68000 network CPU, and a dual GPU setup. The Hikaru hardware was largely complete in 1998, before it was released to the public in 1999. [2]

Specifications

Main Processors

  • Main CPU: 2× Hitachi SH‑4 @ 200 MHz
    • Features: 2× 128‑bit SIMD @ 200 MHz, 2× floating‑point units, graphic functions
    • Bus width: 128‑bit (64‑bit per SH‑4)
    • SH‑4 performance: 720 MIPS, 2.8 GFLOPS, more than 20 million polygons/sec geometry & lighting calculations
    • Note: With Sega Custom 3D GPU geometry processors, the SH‑4's 128‑bit SIMD matrix unit can be dedicated to game physics, artificial intelligence, collision detection, overall game code, and/or further enhancing graphics.
  • Memory control processors:
    • Memory Control CPU: Zilog Z80 (8/16‑bit instructions, 8‑bit bus) [5]
    • Memory controllers: 2× Sega 315‑6154 Memory Controller @ 200 MHz (2× 32‑bit, DMA capabilities) [3][2][6]
  • Network Board processors: [2]
    • Network CPU: Motorola 68000 @ 40 MHz (16/32‑bit instructions, 16‑bit bus, 7 MIPS) [2]
    • Network PLD: FPGA @ 180 MHz (32‑bit),[7]PAL @ 40 MHz, Sega 315-5804 CPLD @ 40 MHz
    • Network processors: 2× Sega 315-5917 @ 40 MHz
  • ROM Board processors: [2]
    • ROM Board PLD: FPGA @ 180 MHz (32‑bit),[7] CPLD/PAL @ 182 MHz (32‑bit) [8][9]
    • Security IC: Sega 315-5881 @ 28 MHz

Sound

Graphics

  • Graphics Engine GPU: Sega Custom 3D GPU @ 250 MHz [10][11][6][3]
    • 6 core processors: [12]
      • 2× Sega GPU Command Processors
      • 2× Sega GPU DMA controllers
      • 2× Sega GPU 1A Image Generator rasterizers/renderers
    • 52 core units: [2]
      • 2× Sega PAL (Lattice GAL16V8) GAL @ 250 MHz: 16 units, 128‑bit (16× 8-bit), DMA control, graphics processing [13]
      • Sega 315‑6202 (Lattice CY37128) CPLD @ 167 MHz: 8 units, 416‑bit internal (8× 52-bit), 128‑bit external (8× 16-bit) [14]
      • 2× Video DAC: 2× Analog Devices ADV7120 @ 80 MHz (48‑bit) [15]
      • 10× Sega IC: 315‑6083A, 315‑6085, 315‑6086, 315‑6087, 315‑6146, 315‑6232, 2× 315‑6084, 2× 315‑6197
    • Geometry Processors: 2× Sega GPU Command Processors
      • Hardware T&L: Transform, clipping, lighting
      • Materials: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, unlit
      • Fog: Color, transparency, density, depth blend, translucency
      • Rendering: Double‑buffered 3D rendering (odd & even frames), depth cueing, depth buffer, depth bias, face culling, static meshes, dynamic meshes
      • Shading: Flat shading, Gouraud shading, Phong shading, diffuse, ambient, specular, linear
      • Modelview matrix: Instanced drawing
      • Object memory: 8 viewports, 256 modelviews, 16,384 materials (256 LOD levels), 16,384 textures/texheads (256 LOD levels), 1024 lights (256 light sets) [11]
    • Texture processors: 2× Sega GPU DMA controllers
      • GPU IDMA (Indirect DMA) controller: Loads texture data from Mask ROM (via external bus) into texture banks (with metadata), allows CPU access to texture banks
      • DMA controller: Moves textures around in framebuffer, transfers bitmap data to bitmap layers, allows CPU access to framebuffer
      • Texture banks: 2 texture banks (stored as 2× 2048×1024 sheets), stores textures from Mask ROM (with 16‑byte metadata per texture in Command Processor RAM), 16×16 to 512×512 texture sizes, multi-texturing, 13 textures per pass (at 640×480 resolution), textures can include mipmap trees
    • Lighting: 1024 lights per scene, 4 lights per polygon, 256 light sets per scene (4 lights per set), 8 window surfaces
      • Light types: Diffuse, ambient, specular, horizontal, spot
      • Emission types: Constant, linear, infinite linear, square, reciprocal, reciprocal squared
      • Object types: Lights (with individual position, direction and emission properties), lightsets (a set of up to 4 lights that share a mesh)
    • Framebuffer: 2048×2048 sheet (can be partitioned into framebuffer, tile data, and/or 1‑2 bitmap layers), handled by 2 GPU 1A Image Generator rasterizers/renderers (for odd & even frames), accessible by DMA controller
    • Other effects: Stencil, shadows, motion blur, particle effects, fire effects, water effects,[1] bump mapping, fog, alpha blending, MIP mapping, trilinear filtering, anti-aliasing, environment mapping, specular effects [16]
    • Other capabilities: 2 bitmap layers, calendar, 16,384 vertices per mesh [17]
  • Color depth: 32‑bit ARGB, 16,777,216 colors (24‑bit color) with 8‑bit (256 levels) alpha blending, YUV and RGB color space, color key overlay
  • Display resolution: 31 kHz horizontal sync, 60 Hz refresh rate, 80 MHz Video DAC, JAMMA/VGA output, progressive scan [2][15]
    • Single monitor display: 496×384 to 800×608 (default 640×480)
    • Dual monitor display: 992×384 to 1600×608 (default 1280×480)
    • Video output: 496×384 to 1968×1080 (default 640×480)
    • Framebuffer: 496×384 to 2048×2048 (default 2048×2048) [2]
  • Geometric performance: [11]
    • 225 million polygons/sec (7.2 GB/sec, 32 bytes per polygon)
    • 150 million polygons/sec with lighting (48 bytes per polygon)
    • 112 million textured polygons/sec (64 bytes per polygon)
    • 90 million textured polygons/sec with lighting (80 bytes per polygon)
  • Floating‑point performance: 21 GFLOPS (1.4 GFLOPS per 10 million lit polygons)
  • Fillrate: [18]
    • Rendering: 6 billion pixels/sec (opaque polygons), over 2 billion pixels/sec (translucent polygons)
    • Textures: Over 2 billion texels/sec

Memory

  • Memory: Up to 462.41 MB (130 MB main, 284 MB video, 48 MB sound, 416 KB other) [19]
  • RAM: 108.3125 MB [6][2]
    • Main RAM: 64 MB SDRAM [20] (32 MB per SH‑4)
    • VRAM: 28 MB (26 MB SDRAM,[21][22] 2 MB SRAM)
      • 8 MB framebuffer, 8 MB texture banks, 5 MB Command Processor, 1 MB Image Generator, 6 MB other VRAM [10]
    • Sound RAM: 16 MB SDRAM (8 MB per AICA)
    • Backup RAM: 64 KB SRAM
    • Network Board RAM: 192 KB SRAM
    • ROM Board RAM: 64 KB SRAM [23]
  • ROM: Up to 354 MB
    • Boot ROM: 2 MB EPROM [2]
    • Game ROM Board: Up to 352 MB (64 MB main ROM, 256 MB video Mask ROM,[24] 32 MB sound ROM)
    • Note: High‑speed access allows ROM to effectively be used as RAM, with polygons and textures streamed directly from game ROM Board. [25]
  • SH‑4 CPU cache: 96 KB (48 KB per SH‑4) [26]

Bandwidth

  • Internal processor bandwidth: 21 GB/sec [2]
    • SH‑4 cache: 3.2 GB/sec (128‑bit, 200 MHz)
    • Sega Custom 3D GPU: 13.5 GB/sec (592‑bit, 250 MHz)
      • GAL: 4 GB/sec (128‑bit, 250 MHz) [13]
      • CPLD: 9 GB/sec (416‑bit, 167 MHz) [14]
      • Video DAC: 480 MB/sec (48‑bit, 80 MHz) [15]
    • 315‑6154 Memory Controllers: 1.6 GB/sec (64‑bit, 200 MHz)
    • AICA Sound Processor: 268 MB/sec (32‑bit, 67 MHz)
    • ROM Board PLD: 1.45 GB/sec (2× 32‑bit, 180/182 MHz)
    • Network Board 68000: 80 MB/sec (16‑bit, 40 MHz)
    • Network Board FPGA: 720 MB/sec (32‑bit, 180 MHz) [7]
  • RAM/ROM memory bandwidth: 16.1 GB/sec
    • Main memory: 3.9 GB/sec (2.4 GB/sec Main RAM, 1.5 GB/sec ROM)
    • Video memory: 10.5 GB/sec (9 GB/sec VRAM, 1.5 GB/sec ROM)
    • Sound memory: 268 MB/sec
  • RAM bandwidth: 12.1 GB/sec [2]
    • Main RAM: 2.4 GB/sec (192‑bit, 100 MHz, 6 ns) [20]
      • SH‑4: 1.6 GB/sec (128‑bit)
      • Memory Controllers: 800 MB/sec (64‑bit)
    • VRAM: 9 GB/sec (400‑bit, 200 MHz, 4.5 ns)
      • HY57V161610 SDRAM: 7.2 GB/sec (288‑bit, 200 MHz, 4.5 ns) [21]
      • K4S641632 SDRAM: 1.33 GB/sec (64‑bit, 166 MHz, 5.5 ns) [22]
      • UPD432232 Synchronous SRAM: 400 MB/sec (32‑bit, 100 MHz, 5 ns) [27]
      • HM62256 SRAM: 44.444444 MB/sec (16‑bit, 22.222222 MHz, 45 ns) [28]
    • Sound RAM: 268 MB/sec (2× 16‑bit, 67 MHz, 6 ns) [22]
    • Backup RAM: 44.444444 MB/sec (16‑bit, 22.222222 MHz, 45 ns) [28]
    • Network Board RAM: 133.333333 MB/sec (48‑bit, 22.222222 MHz, 45 ns) [28]
    • ROM Board RAM: 250 MB/sec (16‑bit, 125 MHz, 8 ns) [23]
  • ROM bandwidth: 4 GB/sec [2]
    • Boot ROM: 800 MB/sec (64‑bit, 100 MHz) [29]
    • ROM Board PLD: 1.45 GB/sec (2× 32‑bit, 180/182 MHz) [7][8][9]
    • ROM Board Connectors: 1.5 GB/sec ( 32‑bit, 182 MHz)

Hardware Images

List of Games


Sega arcade boards
Originating in arcades








  1. 1.0 1.1 http://www.goodcowfilms.com/farm/games/news-archive/Sega%20Confirms%20Hikaru%20DOES%20Exist....htm
  2. 2.00 2.01 2.02 2.03 2.04 2.05 2.06 2.07 2.08 2.09 2.10 2.11 2.12 2.13 https://github.com/mamedev/mame/blob/master/src/mame/drivers/hikaru.cpp
  3. 3.0 3.1 3.2 https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-memctl.c
  4. https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-aica.c
  5. https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-mie.c
  6. 6.0 6.1 6.2 https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru.c
  7. 7.0 7.1 7.2 7.3 File:PLSI2032 datasheet.pdf
  8. 8.0 8.1 File:M4A3 datasheet.pdf
  9. 9.0 9.1 File:MACH111 datasheet.pdf
  10. 10.0 10.1 https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu.c
  11. 11.0 11.1 11.2 https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-cp.c
  12. https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-renderer.c
  13. 13.0 13.1 File:GAL16V8 datasheet.pdf
  14. 14.0 14.1 File:CY37 datasheet.pdf
  15. 15.0 15.1 15.2 File:ADV7120 datasheet.pdf
  16. File:NAOMI 1998 Press Release JP.pdf
  17. https://github.com/stefanoteso/valkyrie/blob/master/src/mach/hikaru/hikaru-gpu-private.h
  18. http://segaretro.org/Sega_NAOMI_2#Technical_Specifications
  19. https://github.com/mamedev/mame/tree/master/src/mame/drivers/hikaru.cpp
  20. 20.0 20.1 File:HM5264 datasheet.pdf
  21. 21.0 21.1 File:HY57V161610D datasheet.pdf
  22. 22.0 22.1 22.2 File:K4S641632 datasheet.pdf
  23. 23.0 23.1 File:CY7C199 datasheet.pdf
  24. http://www.mamedb.com/game/pharrier
  25. http://farm6.staticflickr.com/5471/12172411045_18bfc5912f_c.jpg
  26. http://info.sonicretro.org/File:SH-4_32-bit_CPU_Core_Architecture.pdf
  27. File:UPD432232 datasheet.pdf
  28. 28.0 28.1 28.2 File:HM62256B datasheet.pdf
  29. http://pdf.datasheetcatalog.com/datasheets2/19/194530_1.pdf


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