Difference between revisions of "Sega Master System/Technical specifications"

Latest revision as of 05:40, 23 February 2023

Back to: Sega Master System.

Technical specifications for the Sega Master System.

CPU

Main CPU: NEC 780C (based on Zilog Z80)^[3]

Clock rate: 3.579545 MHz (NTSC), 3.54689493 MHz (PAL/SECAM)^{[n 1]}
The Z80 directly addresses program RAM and ROM, but only addresses VRAM through VDP hardware ports.^[1] It can access VRAM by commanding/programming VDP.^[4]
Instruction set: 8‑bit and 16‑bit instructions, 6–18 registers^[5]
Bus width: 8‑bit

Performance: 0.52 MIPS^[5]

Graphics

GPU: Sega VDP^[1]^[6]

Revisions: Sega 315‑5124 / Yamaha YM2602 (Mark III, Master System), Sega 315‑5246 / NEC UPD9004G (Master System II)
Note: An evolution of the TMS9918
Clock rate: 10.738635 MHz (NTSC),^[7] 10.640685 MHz (PAL)^[8]
Pixel clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)^[9]
Bus width: 16‑bit^{[n 2]}
Memory bus clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)
Registers: 8‑bit and 16‑bit^[10]^[4]
Memory access: VDP directly addresses VRAM, has its own internal CRAM and sprite line buffer, and has access to cartridge ROM. It can be commanded and programmed by Z80.

Color TV signal encoder: Rohm BA7230LS^[3] / Sony V7040 RGB Encoder / Sony CXA1145^[11] / Fujitsu MB3514^[12] / Sony V7040 / Motorola MC1377^[13]^[14]

Color burst clock input: 3.579545 MHz (NTSC),^[3] 3.546895 MHz (PAL)

Screen resolutions: 256x192 and 256x224. PAL/SECAM also supports 256x240.

Overscan resolution: 342x262 (NTSC), 342x313 (PAL)^[4]
Scanlines: 262 (NTSC), 313 (PAL)

Refresh rate: 59.922743 Hz (NTSC), 49.701459 Hz (PAL)^[15]

Maximum frame rate: 59.922743 frames/sec (NTSC), 49.701459 frames/sec (PAL)

Colors: Up to 32 simultaneous colors (16 for sprites, 16 for background) available from a palette of 64 colors (6‑bit RGB), 16 colors (4‑bit) per pixel/tile/sprite

Programmable capabilities: Mid‑frame palette swap allows up to 64 simultaneous colors, 105 color palette (all on screen) possible with static image,^[16] integer sprite zooming^[17] (up to 32×32 pixels)^[18]

VDP display modes:^[4]

Modes 1–2: 256x192 resolution, tilemap, 2 colors per tile, SG-1000 backwards compatibility
Mode 3: 64×48 resolution, bitmap, 16 colors per pixel, SG-1000 backwards compatibility
Mode 4: 256x192, 256x224 and 256x240 resolutions, tilemap, 16 colors per tile, used by most Master System games

VRAM bandwidth:

VDP read bandwidth: 7.692306 MB/s
Z80 write bandwidth: 298.295 KB/s (NTSC), 295.574 KB/s (PAL)^{[n 3]}
Z80 write during active display: 174.794 KB/s (NTSC), 181.112 KB/s (PAL)^[20]

Pixel fillrate:

Read fillrate: 5.369317 MPixels/s (NTSC), 5.320342 MPixels/s (PAL)
Mode 3-4 write fillrate: 4-bit per pixel, 596,590 pixels/s (NTSC), 591,148 pixels/s (PAL)
Mode 3-4 write during active display: 349,588 pixels/s (NTSC), 362,224 pixels/s (PAL)
Mode 1-2 write fillrate: 1-bit per pixel, 2.386363 MPixels/s (NTSC), 2.364595 MPixels/s (PAL)
Mode 1-2 write during active display: 1.398352 MPixels/s (NTSC), 1.448896 MPixels/s (PAL)

Tile read fillrate: 83,895 tiles/sec (NTSC), 83,130 tiles/sec (PAL)

Mode 4

Characters/Tiles: 8x8 pixel characters/tiles, 16 colors per tile, maximum 488 unique characters/tiles on screen (due to VRAM space limitation), horizontal & vertical background tile flipping (up to 1792 flipped tiles in VRAM)
Background: Tilemap playfield, 8x8 tiles, horizontal & vertical tile flipping, up to 448 tiles/patterns in VRAM used by background,^[21] up to 1792 flipped tiles in VRAM used by background, definable priorities for individual background tiles^[4]
Sprites: 16 colors (15 opaque, 1 transparent) per sprite, up to 256 tiles/patterns in VRAM used by sprites,^[4] collision detection^[22]

Sprite pixel sizes: 8x8, 8x16
Sprite zoom pixel sizes: 16x16, 16x32
Sprite line buffer: VDP contains internal sprite line buffer for 8 sprites per scanline, double buffering, prevents delay while VDP reads VRAM, sprite priority determined by order of sprites in buffer^[4]
Sprites on screen: 64 sprites on screen, more than 64 sprites with mid-screen raster effects^[23]
Sprites per scanline: 8 sprites (non-flickering) per scanline, 9 flickering sprites per scanline^[24]

Scrolling: Smooth hardware scrolling, horizontal & vertical scrolling, diagonal scrolling, line scrolling, partial screen scrolling^[25]
IRQ raster interrupt capabilities:^[25] Interrupt per frame, interrupt per scanline,^[4] mid‑frame palette swap, transparency effect, line scrolling, partial screen scrolling
VRAM screen map: 2 KB to 2.25 KB^[21]

Sprite attribute table: 256 bytes (2 Kbits), including 64 byte tile/pattern data
Background name table: 1.75 KB (14 Kbits) or 2 KB (16 Kbits)^[4]^{[n 4]}

Tile write fillrate: 32 bytes per tile, 9321 tiles/sec (NTSC), 9236 tiles/sec (PAL)

Write during active display: 5462 tiles/sec (NTSC), 5659 tiles/sec (PAL)

Modes 1-2

See SG-1000 specifications for more details

Tiles: 832-1024 tiles,^{[n 5]} 2 colors per tile, 8 bytes per tile
Sprites: 32-64 sprites, 64-256 sprite tiles

Sprite pixel sizes: 8x8, 16x16
Sprite zoom pixel sizes: 16x16, 32x32

Tile write fillrate: 8 bytes per tile, 37,286 tiles/sec (NTSC), 36,946 tiles/sec (PAL)

Write during active display: 21,849 tiles/sec (NTSC), 22,639 tiles/sec (PAL)

Additional Master System capabilities: Raster effects, programmable full screen zooming^[26]

Audio

PSG sound chip: Sega PSG (SN76496) @ 3.579545 MHz^[3]^[27]

4 channel mono sound^[25]

3 square wave sound generator tone channels: 4–10 octaves, 16 volume levels, 1024 (10‑bit) frequencies, 122 Hz to 125 kHz frequency range
1 noise generator channel: White noise, periodic noise, 16‑bit LSFR, 16‑bit ring buffer, 3 preset frequencies (7.8 to 19.5 kHz), can match frequency of 3rd tone channel
PCM/PWM sampling: Uses 1-3 tone channels to produce a single PCM channel, 1‑bit to 12‑bit audio depth, 4 kHz to 44.1 kHz sampling rate,^[27]^[28] up to 176.4 kbps (22.05 KB/s) bitrate^[29]^[30]

Clone of the SN76489 with different noise LFSR and frequency counter implementations

FM sound chip: Yamaha YM2413^[25]

9 mono FM synthesis channels
2‑operator FM synthesis sound
Instruments: 15 pre‑defined instruments and user‑defined sound
Rhythm mode: 3 channels can be used for percussion sounds
Built into Japanese Master System
Available as plug‑in module for Mark III
Supported by certain games only

Memory

System RAM: 24 KB (most models) or 40 KB (some models)^[31]^[3]

Main/Program RAM: 8 KB (64 Kbits)

Note: Since Z80 reads program code directly from ROM, program RAM is primarily used for general program data (such as state information).^[32]

VRAM: 16 KB (128 Kbits, most models) or 32 KB (256 Kbits, some models)^[14]

VDP internal memory: 64 bytes (512 bits)^[4]

Color RAM (CRAM): 32 bytes (256 bits, 32x 8-bit entries)
Sprite line buffer: 32 bytes (256 bits, 8x 32-bit entries)

System ROM: 8 KB (64 Kbits) to 256 KB (2 Mbits), depending on built‑in game
Cartridge ROM: 8 KB to 32 KB (Sega Card), 128 KB to 4 MB (Cartridge)^[32]

Note: Z80 can read program code directly from ROM, allowing program RAM to be used for general program data (such as state information).

Cartridge battery backup SRAM: 8 KB (64 Kbits) to 32 KB (256 Kbits)^[33]

Configuration

System memory buses:^[1]^[6]^[4]

Z80, VDP <‑> Main RAM, System ROM, Cartridge ROM (8‑bit)
VDP <‑> VRAM (16‑bit)

System RAM chips:^[1]^[6]^[31]^[14]

Main RAM: 8‑bit, XRAM/SRAM, 3.579545 MHz (NTSC) or 3.546894 MHz (PAL)^{[n 6]}
VRAM: 16‑bit (2x 8‑bit), XRAM/PSRAM, 3.846153 MHz^{[n 7]}

ROM chips: 8‑bit, 3.579545 MHz (NTSC) or 3.546894 MHz (PAL)^{[n 8]}

System ROM: MROM^[1]^[37]
Cartridge ROM: MROM,^[38]^[39]^[40] EPROM, Flash^[41]^[42]^[43]

Bandwidth

System RAM bandwidth: 11 MB/s^{[n 9]}

Main RAM: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL)^{[n 10]}
VRAM: 7.692306 MB/s^{[n 11]}

ROM bandwidth: 3.5 MB/s^{[n 10]}
Internal processor bandwidth:

Z80: 3.579545 MB/s (NTSC), 3.546894 MB/s (PAL)^{[n 12]}
VDP: 10 MB/s^{[n 13]}

CRAM: 5.3693175 MB/s (NTSC), 5.3203424 MB/s (PAL)^{[n 12]}
Sprite line buffer: 5.3693175 MB/s (NTSC), 5.3203424 MB/s (PAL)^{[n 12]}

Notes

↑ [CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228 CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228]
↑ [16‑bit VRAM bus, 8‑bit Z80/ROM bus 16‑bit VRAM bus, 8‑bit Z80/ROM bus]
↑ [Byte per 12 cycles^[19] Byte per 12 cycles^[19]]
↑
[16‑bit per tile^[25]
- 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)
- 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)
- 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)
16‑bit per tile^[25]
- 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)
- 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)
- 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)]
↑ [768 background tiles, 64-256 sprite tiles 768 background tiles, 64-256 sprite tiles]
↑ [279/281 ns^[34]^[35] 279/281 ns^[34]^[35]]
↑ [260 ns^[34]^[36] 260 ns^[34]^[36]]
↑ [279/281 ns 279/281 ns]
↑ [2 buses (24-bit bus width) 2 buses (24-bit bus width)]
↑ ^10.0 ^10.1 [8-bit bus 8-bit bus]
↑ [16-bit bus 16-bit bus]
↑ ^12.0 ^12.1 ^12.2 [8-bit 8-bit]
↑ [16-bit 16-bit]

References

Sega Master System
Topics	Sega Master System \| Technical Specifications (Hardware Comparison) \| History \| Boot ROM \| Magazine articles \| Promotional material \| Merchandise
Hardware	Asia \| North America \| Western Europe \| Eastern Europe \| South America \| Australasia \| Africa Sega Mark III \| Sega Game Box 9 \| Master System Girl \| Master System Super Compact \| Kiosk \| Sega System E
Add-ons	Demo Unit II \| Telecon Pack \| FM Sound Unit \| 3-D Glasses
Controllers	SJ-152 \| Control Pad \| 3-D Glasses \| Control Stick \| Handle Controller \| Light Phaser \| Paddle Control \| Rapid Fire Unit \| Sports Pad \| SG Commander
Misc. Hardware	Action Replay \| Card Catcher \| Action Case \| Freedom Connection \| Playkit
Unreleased	Floppy Disk Drive
Consoles-on-a-chip	Arcade Gamer Portable \| TF-DVD560 \| DVD Karaoke Game DVT-G100 \| Fun Play 20-in-1 \| Handheld Electronic Games \| Master System 3 Collection \| Master System 3 \| Master System Evolution \| Master System Handy \| PlayPal Plug & Play \| Poga

[CPU_clock_cycles_per_frame:_59.2C736_.28NTSC.29.2C_71.2C364_.28PAL.29_.3Cbr.3E_CPU_clock_cycles_per_scanline:_228-4] [CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228 CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL)
CPU clock cycles per scanline: 228]

[16.E2.80.91bit_VRAM_bus.2C_8.E2.80.91bit_Z80.2FROM_bus-11] [16‑bit VRAM bus, 8‑bit Z80/ROM bus 16‑bit VRAM bus, 8‑bit Z80/ROM bus]

[Byte_per_12_cycles.7F.27.22.60UNIQ--ref-00000032-QINU.60.22.27.7F-22] [Byte per 12 cycles^[19] Byte per 12 cycles^[19]]

[16.E2.80.91bit_per_tile.7F.27.22.60UNIQ--ref-00000047-QINU.60.22.27.7F.0A.2A_256x192_resolution:_1.75_KB.2C_32x28_table_.28256x224_pixels.29.2C_896_tiles_.28768_visible.29.0A.2A_256x224_resolution:_2_KB.2C_32x32_table_.28256x256_pixels.29.2C_1024_tiles_.28896_visible.29.0A.2A_256x240_resolution:_2_KB.2C_32x32_table_.28256x256_pixels.29.2C_1024_tiles_.28960_visible.29-29] [16‑bit per tile^[25]
256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)

256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)

256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)
16‑bit per tile^[25]
256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)

256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)

256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)]

[5] 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)

[6] 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)

[7] 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)

[8] 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)

[9] 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)

[10] 256x240 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (960 visible)]

[768_background_tiles.2C_64-256_sprite_tiles-30] [768 background tiles, 64-256 sprite tiles 768 background tiles, 64-256 sprite tiles]

[279.2F281.26nbsp.3B.5B.5Bwikipedia:Nanosecond.7Cns.5D.5D.7F.27.22.60UNIQ--ref-0000006B-QINU.60.22.27.7F.7F.27.22.60UNIQ--ref-0000006E-QINU.60.22.27.7F-41] [279/281 ns^[34]^[35] 279/281 ns^[34]^[35]]

[260.26nbsp.3Bns.7F.27.22.60UNIQ--ref-00000072-QINU.60.22.27.7F.7F.27.22.60UNIQ--ref-00000075-QINU.60.22.27.7F-43] [260 ns^[34]^[36] 260 ns^[34]^[36]]

[279.2F281.26nbsp.3Bns-44] [279/281 ns 279/281 ns]

[2.26nbsp.3Bbuses_.2824-bit_bus_width.29-52] [2 buses (24-bit bus width) 2 buses (24-bit bus width)]

[8-bit_bus-53] 10.0 ^10.1 [8-bit bus 8-bit bus]

[16-bit_bus-54] [16-bit bus 16-bit bus]

[8-bit-55] 12.0 ^12.1 ^12.2 [8-bit 8-bit]

[16-bit-56] [16-bit 16-bit]

[:File:SMSServiceManualEU.pdf_p-1] 1.0 ^1.1 ^1.2 ^1.3 ^1.4 ^1.5 File:SMSServiceManualEU.pdf

[https:.2F.2Fgithub.com.2Fekeeke.2FGenesis-Plus-GX.2Fblob.2Fmaster.2Fcore.2Fsystem.h-2] 2.0 ^2.1 ^2.2 https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h

[Sega_Mark-III_Hardware_Notes_.282008-11-14.29-3] 3.0 ^3.1 ^3.2 ^3.3 ^3.4 Sega Mark-III Hardware Notes (2008-11-14)

[Sega_Master_System_VDP_documentation_.282002-11-12.29-5] 4.00 ^4.01 ^4.02 ^4.03 ^4.04 ^4.05 ^4.06 ^4.07 ^4.08 ^4.09 ^4.10 Sega Master System VDP documentation (2002-11-12)

[.5Bhttp:.2F.2Fwww.drolez.com.2Fretro.2F_Obsolete_Microprocessors.5D-6] 5.0 ^5.1 Obsolete Microprocessors

[:File:SMS2ServiceManualEU.pdf_p-7] 6.0 ^6.1 ^6.2 File:SMS2ServiceManualEU.pdf

[:File:SMSServiceManualEU.pdf_p4-8] File:SMSServiceManualEU.pdf, page 4

[:File:SMSServiceManualEU.pdf_p14-9] File:SMSServiceManualEU.pdf, page 14

[https:.2F.2Fgithub.com.2Fmamedev.2Fmame.2Fblob.2Fmaster.2Fsrc.2Fmame.2Fdrivers.2Fsms.cpp-10] ttps://github.com/mamedev/mame/blob/master/src/mame/drivers/sms.cpp

[:File:SoftwareReferenceManualForSegaMarkIIIEU.pdf_p-12] File:SoftwareReferenceManualForSegaMarkIIIEU.pdf

[:File:CXA1145P_datasheet.pdf_p-13] File:CXA1145P datasheet.pdf

[:File:MB3514_datasheet.pdf_p-14] File:MB3514 datasheet.pdf

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FVideoOutput_Sega_Master_System_Video_Output.5D-15] Sega Master System Video Output

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FDocuments_Sega_Master_System_Documents.5D-16] 14.0 ^14.1 ^14.2 Sega Master System Documents

[.5Bhttps:.2F.2Fgithub.com.2Fjasarien.2FProvenance.2Fblob.2Fmaster.2FPVGenesis.2FPVGenesis.2FGenesis.2FGenesisCore.2Fgenplusgx_source.2Fsystem.c_Genesis_Plus.5D-17] Genesis Plus

[.5Bhttp:.2F.2Fatariage.com.2Fforums.2Ftopic.2F216268-my-first-test-on-the-tms9918.2F_TMS9918_test_.28AtariAge.29.5D-18] TMS9918 test (AtariAge)

[.5Bhttp:.2F.2Fdreamjam.co.uk.2Femuviews.2Ftxt.2Fmsvdp.txt_Sega_Master_System_VDP_Documentation.5D-19] Sega Master System VDP Documentation

[.5Bhttps:.2F.2Fwww.msx.org.2Fforum.2Fmsx-talk.2Fdevelopment.2Fnew-sprite-record_New_sprite_record_.28MSX_Research_Center.29.5D-20] New sprite record (MSX Research Center)

[:File:SC-3000ServiceManual.pdf_p12-21] File:SC-3000ServiceManual.pdf, page 12

[.5Bhttp:.2F.2Fwww.smspower.org.2Fforums.2F14599-HowManyBytesCanIWriteToVRAMPerFrame_Bytes_written_to_VRAM_per_frame.5D-23] Bytes written to VRAM per frame

[:File:SoftwareReferenceManualForSegaMarkIIIEU.pdf_p8-24] 21.0 ^21.1 File:SoftwareReferenceManualForSegaMarkIIIEU.pdf, page 8

[:File:SoftwareReferenceManualForSegaMarkIIIEU.pdf_p6-25] File:SoftwareReferenceManualForSegaMarkIIIEU.pdf, page 6

[.5Bhttp:.2F.2Fwww.smspower.org.2Fforums.2F16026-DisplayingMoreThan32ColoursRasterEffects_Displaying_more_than_32_colours_-_raster_effect_.28SMS_Power.29.5D-26] Displaying more than 32 colours - raster effect (SMS Power)

[.5Bhttp:.2F.2Fatariage.com.2Fforums.2Ftopic.2F220934-questions-about-coleco-graphics-capacity.2F.3Fp.3D2910264_Coleco_graphics_capacity_.28AtariAge.29.5D-27] Coleco graphics capacity (AtariAge)

[Sega_Master_System_Technical_Documentation_.281998-06-10.29-28] 25.0 ^25.1 ^25.2 ^25.3 ^25.4 Sega Master System Technical Documentation (1998-06-10)

[.5Bhttp:.2F.2Fwww.smspower.org.2Fforums.2F7851-FunWithZooming_Fun_with_zooming_.28SMS_Power.29.5D-31] Fun with zooming (SMS Power)

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FSN76489_Sega_SN76489.5D-32] 27.0 ^27.1 Sega SN76489

[.5Bhttps:.2F.2Fgithub.com.2Fmaxim-zhao.2Fpcmenc_pcmenc:_Advanced_PCM_encoder_for_8-bit_sound_chips.5D-33] : Advanced PCM encoder for 8-bit sound chips

[.5Bhttp:.2F.2Fwww.smspower.org.2Fforums.2F15964-HighQualityPCMWithPcmencFeedbackRequested_High-quality_PCM_with_pcmenc.5D-34] High-quality PCM with pcmenc

[.5Bhttps:.2F.2Fwww.youtube.com.2Fwatch.3Fv.3DZX4A2EYAYfU_Sega_Master_System_high-fidelity_audio.5D-35] Sega Master System high-fidelity audio

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FRAM_Sega_Master_System_RAM.5D-36] 31.0 ^31.1 Sega Master System RAM

[.5Bhttp:.2F.2Fwww.smspower.org.2Fuploads.2FDevelopment.2Fsmsarch.html_SMSARCH:_A_Sega_Master_System_Cartridge_Archiver.5D-37] 32.0 ^32.1 SMSARCH: A Sega Master System Cartridge Archiver

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FMappers_Sega_Mappers.5D-38] Sega Mappers

[:File:UPD4168_datasheet.pdf_p-39] 34.0 ^34.1 File:UPD4168 datasheet.pdf

[:File:KM6264B_datasheet.pdf_p-40] File:KM6264B datasheet.pdf

[:File:HM65256B_datasheet.pdf_p-42] File:HM65256B datasheet.pdf

[:File:CXK3864_datasheet.pdf_p-45] File:CXK3864 datasheet.pdf

[.5Bhttp:.2F.2Fwww.smspower.org.2FDevelopment.2FROMPartNumbers_ROM_Part_Numbers.5D-46] ROM Part Numbers

[:File:MB831000_datasheet.pdf_p-47] File:MB831000 datasheet.pdf

[.5Bhttp:.2F.2Fdreamjam.co.uk.2Femuviews.2Ftxt.2Fsmsmap.txt_Memory_Mapper_Hardware_Notes.5D-48] Memory Mapper Hardware Notes

[SMS_PINOUTs-49] SMS PINOUTs

[:File:TMS27C512_datasheet.pdf_p-50] File:TMS27C512 datasheet.pdf

[:File:AM29F040_datasheet.pdf_p-51] File:AM29F040 datasheet.pdf

[1]

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@@ Line 5: / Line 5: @@
 * System master clock rate: 53.693175 MHz ([[NTSC]]), 53.203424 MHz ([[PAL]]){{fileref|SMSServiceManualEU.pdf}}{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}}
-** Master clock cycles per frame: 896,040 (NTSC), 1,070,460 (PAL){{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}}
+:* Master clock cycles per frame: 896,040 (NTSC), 1,070,460 (PAL){{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}}
-** Master clock cycles per scanline: 3420{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}}
+:* Master clock cycles per scanline: 3420{{ref|https://github.com/ekeeke/Genesis-Plus-GX/blob/master/core/system.h}}
 ==CPU==
 {{multicol|
 * Main CPU: [[NEC]] 780C (based on [[Zilog]] [[Z80]]){{intref|Sega Mark-III Hardware Notes (2008-11-14)}}
-** [[wikipedia:Clock rate|Clock rate]]: 3.579545 MHz (NTSC), 3.54689493 MHz (PAL/SECAM){{ref|CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL) <br> CPU clock cycles per scanline: 228|group=n}}
+:* [[wikipedia:Clock rate|Clock rate]]: 3.579545 MHz (NTSC), 3.54689493 MHz (PAL/SECAM){{ref|CPU clock cycles per frame: 59,736 (NTSC), 71,364 (PAL) <br> CPU clock cycles per scanline: 228|group=n}}
-** The Z80 directly addresses program [[RAM]] and [[ROM]], but only addresses [[VRAM]] through VDP hardware ports.{{fileref|SMSServiceManualEU.pdf}} It can access VRAM by commanding/programming VDP.{{intref|Sega Master System VDP documentation (2002-11-12)}}
+:* The Z80 directly addresses program [[RAM]] and [[ROM]], but only addresses [[VRAM]] through VDP hardware ports.{{fileref|SMSServiceManualEU.pdf}} It can access VRAM by commanding/programming VDP.{{intref|Sega Master System VDP documentation (2002-11-12)}}
-** [[wikipedia:Instruction set|Instruction set]]: 8‑bit and 16‑bit instructions, 6–18 registers{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}}
+:* [[wikipedia:Instruction set|Instruction set]]: 8‑bit and 16‑bit instructions, 6–18 registers{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}}
-** Bus width: 8‑bit
+:* Bus width: 8‑bit
-* Performance: 0.51 [[wikipedia:Instructions per second|MIPS]]{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}}
+* Performance: 0.52 [[wikipedia:Instructions per second|MIPS]]{{ref|[http://www.drolez.com/retro/ Obsolete Microprocessors]}}
 }}
@@ Line 21: / Line 21: @@
 {{multicol|
 * GPU: Sega [[VDP]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}
-** Revisions: Sega 315‑5124 / Yamaha YM2602 (Mark III, Master System), Sega 315‑5246 / NEC UPD9004G (Master System II)
+:* Revisions: Sega 315‑5124 / [[Yamaha]] YM2602 (Mark III, Master System), Sega 315‑5246 / NEC UPD9004G (Master System II)
-** Note: An evolution of the [[TMS9918]]
+:* Note: An evolution of the [[TMS9918]]
-** Clock rate: 10.738635 MHz (NTSC),{{fileref|SMSServiceManualEU.pdf|page=4}} 10.6406848 MHz (PAL){{fileref|SMSServiceManualEU.pdf|page=14}}
+:* Clock rate: 10.738635 MHz (NTSC),{{fileref|SMSServiceManualEU.pdf|page=4}} 10.640685 MHz (PAL){{fileref|SMSServiceManualEU.pdf|page=14}}
-** [[Pixel]] clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL){{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/sms.cpp}}
+:* [[Pixel]] clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL){{ref|https://github.com/mamedev/mame/blob/master/src/mame/drivers/sms.cpp}}
-** Bus width: 16‑bit{{ref|16‑bit VRAM bus, 8‑bit Z80/ROM bus|group=n}}
+:* Bus width: 16‑bit{{ref|16‑bit VRAM bus, 8‑bit Z80/ROM bus|group=n}}
-** Memory bus clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)
+:* Memory bus clock rate: 5.3693175 MHz (NTSC), 5.3203424 MHz (PAL)
-** Registers: 8‑bit and 16‑bit{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}}
+:* Registers: 8‑bit and 16‑bit{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}}
-** Memory access: VDP directly addresses [[VRAM]], has its own internal CRAM and sprite line buffer, and has access to cartridge ROM. It can be commanded and programmed by Z80.
+:* Memory access: VDP directly addresses [[VRAM]], has its own internal CRAM and sprite line buffer, and has access to cartridge ROM. It can be commanded and programmed by Z80.
 * Color TV signal encoder: [[wikipedia:Rohm|Rohm]] BA7230LS{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} / [[Sony]] [http://console5.com/wiki/V7040 V7040 RGB Encoder] / Sony CXA1145{{fileref|CXA1145P datasheet.pdf}} / [[Fujitsu]] MB3514{{fileref|MB3514 datasheet.pdf}} / Sony V7040 / [[Motorola]] MC1377{{ref|[http://www.smspower.org/Development/VideoOutput Sega Master System Video Output]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}}
-** Color burst clock input: 3.579545 MHz (NTSC),{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} 3.546895 MHz (PAL)
+:* Color burst clock input: 3.579545 MHz (NTSC),{{intref|Sega Mark-III Hardware Notes (2008-11-14)}} 3.546895 MHz (PAL)
 * Screen [[resolution]]s: 256x192 and 256x224. PAL/SECAM also supports 256x240.
-** Overscan resolution: 342x262 (NTSC), 342x313 (PAL){{intref|Sega Master System VDP documentation (2002-11-12)}}
+:* Overscan resolution: 342x262 (NTSC), 342x313 (PAL){{intref|Sega Master System VDP documentation (2002-11-12)}}
-** [[wikipedia:Scan line|Scanlines]]: 262 (NTSC), 313 (PAL)
+:* [[wikipedia:Scan line|Scanlines]]: 262 (NTSC), 313 (PAL)
 * Refresh rate: 59.922743 Hz (NTSC), 49.701459 Hz (PAL){{ref|[https://github.com/jasarien/Provenance/blob/master/PVGenesis/PVGenesis/Genesis/GenesisCore/genplusgx_source/system.c Genesis Plus]}}
-** Maximum frame rate: 59.922743 frames/sec (NTSC), 49.701459 frames/sec (PAL)
+:* Maximum frame rate: 59.922743 frames/sec (NTSC), 49.701459 frames/sec (PAL)
 * [[Palette|Colors]]: Up to 32 simultaneous colors (16 for sprites, 16 for background) available from a [[palette]] of 64 colors (6‑bit RGB), 16 colors (4‑bit) per pixel/tile/sprite
-** Programmable capabilities: Mid‑frame palette swap allows up to 64 simultaneous colors, 105 color palette (all on screen) possible with static image{{ref|[http://atariage.com/forums/topic/216268-my-first-test-on-the-tms9918/ TMS9918 test (AtariAge)]}}
+:* Programmable capabilities: Mid‑frame palette swap allows up to 64 simultaneous colors, 105 color palette (all on screen) possible with static image,{{ref|[http://atariage.com/forums/topic/216268-my-first-test-on-the-tms9918/ TMS9918 test (AtariAge)]}} integer sprite zooming{{ref|[http://dreamjam.co.uk/emuviews/txt/msvdp.txt Sega Master System VDP Documentation]}} (up to 32×32&nbsp;pixels){{ref|[https://www.msx.org/forum/msx-talk/development/new-sprite-record New sprite record (MSX Research Center)]}}
 * VDP display modes:{{intref|Sega Master System VDP documentation (2002-11-12)}}
-** Modes 1–2: 256x192 resolution, [[wikipedia:Tile-based video game|tilemap]], 2 colors per tile, [[SG-1000]] backwards compatibility
+:* Modes 1–2: 256x192 resolution, [[wikipedia:Tile-based video game|tilemap]], 2 colors per tile, [[SG-1000]] backwards compatibility
-** Mode 3: 64×48 resolution, [[wikipedia:Bitmap|bitmap]], 16 colors per pixel, SG-1000 backwards compatibility
+:* Mode 3: 64×48 resolution, [[wikipedia:Bitmap|bitmap]], 16 colors per pixel, SG-1000 backwards compatibility
-** Mode 4: 256x192, 256x224 and 256x240 resolutions, tilemap, 16 colors per tile, used by most Master System games
+:* Mode 4: 256x192, 256x224 and 256x240 resolutions, tilemap, 16 colors per tile, used by most Master System games
 * VRAM bandwidth:
-** VDP read bandwidth: 7.692306&nbsp;MB/s
+:* VDP read bandwidth: 7.692306&nbsp;MB/s
-** Z80 write bandwidth: 298.295 KB/s (NTSC), 295.574 KB/s (PAL){{ref|Byte per 12 cycles{{fileref|SC-3000ServiceManual.pdf|page=12}}|group=n}}
+:* Z80 write bandwidth: 298.295 KB/s (NTSC), 295.574 KB/s (PAL){{ref|Byte per 12 cycles{{fileref|SC-3000ServiceManual.pdf|page=12}}|group=n}}
-** Z80 write during active display: 174.794 KB/s (NTSC), 181.112 KB/s (PAL){{ref|[http://www.smspower.org/forums/14599-HowManyBytesCanIWriteToVRAMPerFrame Bytes written to VRAM per frame]}}
+:* Z80 write during active display: 174.794 KB/s (NTSC), 181.112 KB/s (PAL){{ref|[http://www.smspower.org/forums/14599-HowManyBytesCanIWriteToVRAMPerFrame Bytes written to VRAM per frame]}}
 * Pixel [[fillrate]]:
-** Read fillrate: 5.369317 [[Pixel|MPixels/s]] (NTSC), 5.320342 MPixels/s (PAL)
+:* Read fillrate: 5.369317 [[Pixel|MPixels/s]] (NTSC), 5.320342 MPixels/s (PAL)
-** Mode 3-4 write fillrate: 4-bit per pixel, 596,590 [[Pixel|pixels/s]] (NTSC), 591,148 pixels/s (PAL)
+:* Mode 3-4 write fillrate: 4-bit per pixel, 596,590 [[Pixel|pixels/s]] (NTSC), 591,148 pixels/s (PAL)
-** Mode 3-4 write during active display: 349,588 pixels/s (NTSC), 362,224 pixels/s (PAL)
+:* Mode 3-4 write during active display: 349,588 pixels/s (NTSC), 362,224 pixels/s (PAL)
-** Mode 1-2 write fillrate: 1-bit per pixel, 2.386363 MPixels/s (NTSC), 2.364595 MPixels/s (PAL)
+:* Mode 1-2 write fillrate: 1-bit per pixel, 2.386363 MPixels/s (NTSC), 2.364595 MPixels/s (PAL)
-** Mode 1-2 write during active display: 1.398352 MPixels/s (NTSC), 1.448896 MPixels/s (PAL)
+:* Mode 1-2 write during active display: 1.398352 MPixels/s (NTSC), 1.448896 MPixels/s (PAL)
 * Tile read fillrate: 83,895 tiles/sec (NTSC), 83,130 tiles/sec (PAL)
 }}
@@ Line 60: / Line 60: @@
 * Background: [[wikipedia:Tile engine|Tilemap]] playfield, 8x8 tiles, horizontal & vertical tile flipping, up to 448 tiles/patterns in VRAM used by background,{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}} up to 1792 flipped tiles in VRAM used by background, definable priorities for individual background tiles{{intref|Sega Master System VDP documentation (2002-11-12)}}
 * [[Sprite]]s: 16 colors (15 opaque, 1 transparent) per sprite, up to 256 tiles/patterns in VRAM used by sprites,{{intref|Sega Master System VDP documentation (2002-11-12)}} [http://www.smspower.org/Development/CollisionDetection collision detection]{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=6}}
-** Sprite pixel sizes: 8x8, 8x16
+:* Sprite pixel sizes: 8x8, 8x16
-** Sprite zoom pixel sizes: 16x16, 16x32
+:* Sprite zoom pixel sizes: 16x16, 16x32
-** Sprite line [[wikipedia:Data buffer|buffer]]: VDP contains internal sprite line buffer for 8 sprites per scanline, double buffering, prevents delay while VDP reads VRAM, sprite priority determined by order of sprites in buffer{{intref|Sega Master System VDP documentation (2002-11-12)}}
+:* Sprite line [[wikipedia:Data buffer|buffer]]: VDP contains internal sprite line buffer for 8 sprites per scanline, double buffering, prevents delay while VDP reads VRAM, sprite priority determined by order of sprites in buffer{{intref|Sega Master System VDP documentation (2002-11-12)}}
-** Sprites on screen: 64 sprites on screen, more than 64 sprites with mid-screen raster effects{{ref|[http://www.smspower.org/forums/16026-DisplayingMoreThan32ColoursRasterEffects Displaying more than 32 colours - raster effect (SMS Power)]}}
+:* Sprites on screen: 64 sprites on screen, more than 64 sprites with mid-screen raster effects{{ref|[http://www.smspower.org/forums/16026-DisplayingMoreThan32ColoursRasterEffects Displaying more than 32 colours - raster effect (SMS Power)]}}
-** Sprites per scanline: 8 sprites (non-flickering) per scanline, 9 flickering sprites per scanline{{ref|1=[http://atariage.com/forums/topic/220934-questions-about-coleco-graphics-capacity/?p=2910264 Coleco graphics capacity (AtariAge)]}}
+:* Sprites per scanline: 8 sprites (non-flickering) per scanline, 9 flickering sprites per scanline{{ref|1=[http://atariage.com/forums/topic/220934-questions-about-coleco-graphics-capacity/?p=2910264 Coleco graphics capacity (AtariAge)]}}
 * Scrolling: Smooth hardware scrolling, horizontal & vertical scrolling, diagonal scrolling, [[wikipedia:Parallax scrolling#Raster method|line scrolling]], partial screen scrolling{{intref|Sega Master System Technical Documentation (1998-06-10)}}
 * [[wikipedia:Interrupt request|IRQ]] [[wikipedia:Raster interrupt|raster interrupt]] capabilities:{{intref|Sega Master System Technical Documentation (1998-06-10)}} Interrupt per frame, interrupt per scanline,{{intref|Sega Master System VDP documentation (2002-11-12)}} mid‑frame palette swap, transparency effect, line scrolling, partial screen scrolling
 * [[VRAM]] screen map: 2 KB to 2.25 KB{{fileref|SoftwareReferenceManualForSegaMarkIIIEU.pdf|page=8}}
-** [[Sprite]] attribute table: 256 [[byte]]s (2 [[Bit|Kbits]]), including 64 byte tile/pattern data
+:* [[Sprite]] attribute table: 256 [[byte]]s (2 [[Bit|Kbits]]), including 64 byte tile/pattern data
-** Background name table: 1.75 [[Byte|KB]] (14 Kbits) or 2 KB (16 Kbits){{intref|Sega Master System VDP documentation (2002-11-12)}}{{ref|16‑bit per tile{{intref|Sega Master System Technical Documentation (1998-06-10)}}
+:* Background name table: 1.75 [[Byte|KB]] (14 Kbits) or 2 KB (16 Kbits){{intref|Sega Master System VDP documentation (2002-11-12)}}{{ref|16‑bit per tile{{intref|Sega Master System Technical Documentation (1998-06-10)}}
 * 256x192 resolution: 1.75 KB, 32x28 table (256x224 pixels), 896 tiles (768 visible)
 * 256x224 resolution: 2 KB, 32x32 table (256x256 pixels), 1024 tiles (896 visible)
@@ Line 75: / Line 75: @@
 |group=n}}
 * Tile write fillrate: 32 bytes per tile, 9321 tiles/sec (NTSC), 9236 tiles/sec (PAL)
-** Write during active display: 5462 tiles/sec (NTSC), 5659 tiles/sec (PAL)
+:* Write during active display: 5462 tiles/sec (NTSC), 5659 tiles/sec (PAL)
 }}
@@ Line 84: / Line 84: @@
 * Tiles: 832-1024 tiles,{{ref|768 background tiles, 64-256 sprite tiles|group=n}} 2 colors per tile, 8 bytes per tile
 * Sprites: 32-64 sprites, 64-256 sprite tiles
-** Sprite pixel sizes: 8x8, 16x16
+:* Sprite pixel sizes: 8x8, 16x16
-** Sprite zoom pixel sizes: 16x16, 32x32
+:* Sprite zoom pixel sizes: 16x16, 32x32
 * Tile write fillrate: 8 bytes per tile, 37,286 tiles/sec (NTSC), 36,946 tiles/sec (PAL)
-** Write during active display: 21,849 tiles/sec (NTSC), 22,639 tiles/sec (PAL)
+:* Write during active display: 21,849 tiles/sec (NTSC), 22,639 tiles/sec (PAL)
 * Additional Master System capabilities: Raster effects, programmable full screen zooming{{ref|[http://www.smspower.org/forums/7851-FunWithZooming Fun with zooming (SMS Power)]}}
 }}
@@ Line 93: / Line 93: @@
 ==Audio==
 {{multicol|
-* [[wikipedia:Programmable sound generator|PSG]] [[wikipedia:Sound chip|sound chip]]: Sega PSG ([[SN76489|SN76496]]) @ 3.579545 MHz{{intref|Sega Mark-III Hardware Notes (2008-11-14)}}{{ref|[http://www.smspower.org/Development/SN76489 Sega SN76489]}}
+* [[wikipedia:Programmable sound generator|PSG]] [https://gamicus.gamepedia.com/Sound_chip sound chip]: Sega PSG ([[SN76489|SN76496]]) @ 3.579545 MHz{{intref|Sega Mark-III Hardware Notes (2008-11-14)}}{{ref|[http://www.smspower.org/Development/SN76489 Sega SN76489]}}
-** 4 channel mono sound{{intref|Sega Master System Technical Documentation (1998-06-10)}}
+:* 4 channel mono sound{{intref|Sega Master System Technical Documentation (1998-06-10)}}
-*** 3 [[wikipedia:Square wave|square wave]] sound generator tone channels: 4–10 octaves, 16 volume levels, 1024 (10‑bit) frequencies, 122 Hz to 125 kHz frequency range
+::* 3 [[wikipedia:Square wave|square wave]] sound generator tone channels: 4–10 octaves, 16 volume levels, 1024 (10‑bit) frequencies, 122 Hz to 125 kHz frequency range
-*** 1 noise generator channel: [[wikipedia:White noise|White noise]], periodic noise, 16‑bit [[wikipedia:Linear feedback shift register|LSFR]], 16‑bit [[wikipedia:Ring buffer|ring buffer]], 3 preset frequencies (7.8 to 19.5 kHz), can match frequency of 3rd tone channel
+::* 1 noise generator channel: [[wikipedia:White noise|White noise]], periodic noise, 16‑bit [[wikipedia:Linear feedback shift register|LSFR]], 16‑bit [[wikipedia:Ring buffer|ring buffer]], 3 preset frequencies (7.8 to 19.5 kHz), can match frequency of 3rd tone channel
-** [[wikipedia:Pulse-code modulation|PCM]]/[[wikipedia:Pulse-width modulation|PWM]] sampling: Uses 3 tone channels, 1‑bit to 8‑bit audio depth, 5–64 kHz sampling rate, up to 16 KB per sample
+::* [[PCM]]/[[wikipedia:Pulse-width modulation|PWM]] sampling: Uses 1-3 tone channels to produce a single PCM channel, 1‑bit to 12‑bit audio depth, 4 kHz to 44.1 kHz sampling rate,{{ref|[http://www.smspower.org/Development/SN76489 Sega SN76489]}}{{ref|[https://github.com/maxim-zhao/pcmenc pcmenc: Advanced PCM encoder for 8-bit sound chips]}} up to 176.4 kbps (22.05 KB/s) bitrate{{ref|[http://www.smspower.org/forums/15964-HighQualityPCMWithPcmencFeedbackRequested High-quality PCM with pcmenc]}}{{ref|1=[https://www.youtube.com/watch?v=ZX4A2EYAYfU Sega Master System high-fidelity audio]}}
-** Based on TI [[SN76489]]
+:* Clone of the [[SN76489]] with different noise [[wikipedia:Linear-feedback shift register|LFSR]] and frequency counter implementations
 * FM sound chip: [[Yamaha]] [[YM2413]]{{intref|Sega Master System Technical Documentation (1998-06-10)}}
-** 9 mono [[wikipedia:Frequency modulation synthesis|FM synthesis]] channels
+:* 9 mono [[wikipedia:Frequency modulation synthesis|FM synthesis]] channels
-** 2‑operator FM synthesis sound
+:* 2‑operator FM synthesis sound
-** Instruments: 15 pre‑defined instruments and user‑defined sound
+:* Instruments: 15 pre‑defined instruments and user‑defined sound
-** Rhythm mode: 3 channels can be used for percussion sounds
+:* Rhythm mode: 3 channels can be used for percussion sounds
-** Built into Japanese Master System
+:* Built into Japanese Master System
-** Available as plug‑in module for Mark III
+:* Available as plug‑in module for Mark III
-** Supported by certain games only
+:* Supported by certain games only
 }}
@@ Line 112: / Line 112: @@
 {{multicol|
 * System [[RAM]]: 24&nbsp;[[Byte|KB]] (most models) or 40&nbsp;KB (some models){{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{intref|Sega Mark-III Hardware Notes (2008-11-14)}}
-** Main/Program RAM: 8&nbsp;KB (64&nbsp;[[Bit|Kbits]])
+:* Main/Program RAM: 8&nbsp;KB (64&nbsp;[[Bit|Kbits]])
-*** Note: Since Z80 reads program code directly from ROM, program RAM is primarily used for general program data (such as state information).{{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}}
+::* Note: Since Z80 reads program code directly from ROM, program RAM is primarily used for general program data (such as state information).{{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}}
-** [[VRAM]]: 16&nbsp;KB (128&nbsp;Kbits, most models) or 32&nbsp;KB (256&nbsp;Kbits, some models){{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}}
+:* [[VRAM]]: 16&nbsp;KB (128&nbsp;Kbits, most models) or 32&nbsp;KB (256&nbsp;Kbits, some models){{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}}
 * VDP internal memory: 64&nbsp;[[byte]]s (512&nbsp;[[bit]]s){{intref|Sega Master System VDP documentation (2002-11-12)}}
-** Color RAM (CRAM): 32&nbsp;bytes (256&nbsp;bits, 32x 8-bit entries)
+:* Color RAM (CRAM): 32&nbsp;bytes (256&nbsp;bits, 32x 8-bit entries)
-** Sprite line buffer: 32&nbsp;bytes (256&nbsp;bits, 8x 32-bit entries)
+:* Sprite line buffer: 32&nbsp;bytes (256&nbsp;bits, 8x 32-bit entries)
 * System [[ROM]]: 8&nbsp;KB (64&nbsp;Kbits) to 256&nbsp;KB (2&nbsp;Mbits), depending on built‑in game
 * [[Cartridge]] ROM: 8&nbsp;KB to 32&nbsp;KB ([[Sega Card]]), 128&nbsp;KB to 4&nbsp;MB ([[Cartridge]]){{ref|[http://www.smspower.org/uploads/Development/smsarch.html SMSARCH: A Sega Master System Cartridge Archiver]}}
-** Note: Z80 can read program code directly from ROM, allowing program RAM to be used for general program data (such as state information).
+:* Note: Z80 can read program code directly from ROM, allowing program RAM to be used for general program data (such as state information).
 * Cartridge battery backup [[SRAM]]: 8&nbsp;KB (64&nbsp;Kbits) to 32&nbsp;KB (256&nbsp;Kbits){{ref|[http://www.smspower.org/Development/Mappers Sega Mappers]}}
 }}
@@ Line 127: / Line 127: @@
 {{multicol|
 * System memory buses:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{intref|Sega Master System VDP documentation (2002-11-12)}}
-** Z80, VDP <‑> Main RAM, System ROM, Cartridge ROM (8‑bit)
+:* Z80, VDP <‑> Main RAM, System ROM, Cartridge ROM (8‑bit)
-** VDP <‑> VRAM (16‑bit)
+:* VDP <‑> VRAM (16‑bit)
 * System RAM chips:{{fileref|SMSServiceManualEU.pdf}}{{fileref|SMS2ServiceManualEU.pdf}}{{ref|[http://www.smspower.org/Development/RAM Sega Master System RAM]}}{{ref|[http://www.smspower.org/Development/Documents Sega Master System Documents]}}
-** Main RAM: 8‑bit, [[wikipedia:Pseudostatic RAM|XRAM]]/[[SRAM]], 3.579545&nbsp;MHz (NTSC) or 3.546894&nbsp;MHz (PAL){{ref|279/281&nbsp;[[wikipedia:Nanosecond|ns]]{{fileref|UPD4168 datasheet.pdf}}{{fileref|KM6264B datasheet.pdf}}|group=n}}
+:* Main RAM: 8‑bit, [[wikipedia:Pseudostatic RAM|XRAM]]/[[SRAM]], 3.579545&nbsp;MHz (NTSC) or 3.546894&nbsp;MHz (PAL){{ref|279/281&nbsp;[[wikipedia:Nanosecond|ns]]{{fileref|UPD4168 datasheet.pdf}}{{fileref|KM6264B datasheet.pdf}}|group=n}}
-** VRAM: 16‑bit (2x 8‑bit), XRAM/[[wikipedia:Pseudostatic RAM|PSRAM]], 3.846153&nbsp;MHz{{ref|260&nbsp;ns{{fileref|UPD4168 datasheet.pdf}}{{fileref|HM65256B datasheet.pdf}}|group=n}}
+:* VRAM: 16‑bit (2x 8‑bit), XRAM/[[wikipedia:Pseudostatic RAM|PSRAM]], 3.846153&nbsp;MHz{{ref|260&nbsp;ns{{fileref|UPD4168 datasheet.pdf}}{{fileref|HM65256B datasheet.pdf}}|group=n}}
 * ROM chips: 8‑bit, 3.579545&nbsp;MHz (NTSC) or 3.546894&nbsp;MHz (PAL){{ref|279/281&nbsp;ns|group=n}}
-** System ROM: [[wikipedia:Mask ROM|MROM]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|CXK3864 datasheet.pdf}}
+:* System ROM: [[wikipedia:Mask ROM|MROM]]{{fileref|SMSServiceManualEU.pdf}}{{fileref|CXK3864 datasheet.pdf}}
-** Cartridge ROM: MROM,{{ref|[http://www.smspower.org/Development/ROMPartNumbers ROM Part Numbers]}}{{fileref|MB831000 datasheet.pdf}}{{ref|[http://dreamjam.co.uk/emuviews/txt/smsmap.txt Memory Mapper Hardware Notes]}} [[EPROM]], [[wikipedia:Flash memory|Flash]]{{ref|[https://web.archive.org/web/20090205131908/consolasparasiempre.net/doc/SMSPinRom.txt SMS PINOUTs: ROMs]}}{{fileref|TMS27C512 datasheet.pdf}}{{fileref|AM29F040 datasheet.pdf}}
+:* Cartridge ROM: MROM,{{ref|[http://www.smspower.org/Development/ROMPartNumbers ROM Part Numbers]}}{{fileref|MB831000 datasheet.pdf}}{{ref|[http://dreamjam.co.uk/emuviews/txt/smsmap.txt Memory Mapper Hardware Notes]}} [[EPROM]], [[wikipedia:Flash memory|Flash]]{{intref|SMS PINOUTs}}{{fileref|TMS27C512 datasheet.pdf}}{{fileref|AM29F040 datasheet.pdf}}
 }}
@@ Line 140: / Line 140: @@
 {{multicol|
 * System RAM bandwidth: 11&nbsp;MB/s{{ref|2&nbsp;buses (24-bit bus width)|group=n}}
-** Main RAM: 3.579545&nbsp;MB/s (NTSC), 3.546894&nbsp;MB/s (PAL){{ref|8-bit bus|group=n}}
+:* Main RAM: 3.579545&nbsp;MB/s (NTSC), 3.546894&nbsp;MB/s (PAL){{ref|8-bit bus|group=n}}
-** VRAM: 7.692306&nbsp;MB/s{{ref|16-bit bus|group=n}}
+:* VRAM: 7.692306&nbsp;MB/s{{ref|16-bit bus|group=n}}
 * ROM bandwidth: 3.5&nbsp;MB/s{{ref|8-bit bus|group=n}}
 * Internal processor bandwidth:
-** Z80: 3.579545&nbsp;MB/s (NTSC), 3.546894&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
+:* Z80: 3.579545&nbsp;MB/s (NTSC), 3.546894&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
-** VDP: 10&nbsp;MB/s{{ref|16-bit|group=n}}
+:* VDP: 10&nbsp;MB/s{{ref|16-bit|group=n}}
-*** CRAM: 5.3693175&nbsp;MB/s (NTSC), 5.3203424&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
+::* CRAM: 5.3693175&nbsp;MB/s (NTSC), 5.3203424&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
-*** Sprite line buffer: 5.3693175&nbsp;MB/s (NTSC), 5.3203424&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
+::* Sprite line buffer: 5.3693175&nbsp;MB/s (NTSC), 5.3203424&nbsp;MB/s (PAL){{ref|8-bit|group=n}}
 }}
@@ Line 163: / Line 163: @@
 [[Category:Sega Master System|Technical specifications]]
+[[Category:Master System hardware|Technical specifications]]
+[[Category:Technical specifications|Master System]]

Difference between revisions of "Sega Master System/Technical specifications"

From Sega Retro

Latest revision as of 05:40, 23 February 2023

Contents

CPU

Graphics

Mode 4

Modes 1-2

Audio

Memory

Configuration

Bandwidth

Notes

References