Difference between revisions of "SuperH"

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The '''SuperH''' (or '''SH''') is a microprocessor architecture. The SuperH core is [[RISC]] based and found in a large number of embedded systems.
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[[File:SuperH logo.svg|320px|right]]
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The '''SuperH''' (or '''SH''') is a family of microprocessors, originally developed by [[Hitachi]] during the 1990s as the successor to the H8 family, and now supported by Renesas. They were notable for their time as being capable, yet relatively cheap units with low power consumption.
  
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The SuperH family was first developed by [[Hitachi]] as the successor to the H8 Family and was outsourced to the newly-formed SuperH Inc., owned by Hitachi and ST Microelectronics. SuperH Inc now sells the designs of the CPU cores.
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The SuperH family was introduced in 1992.{{ref|[http://www.hotchips.org/wp-content/uploads/hc_archives/hc06/2_Mon/HC6.S4/HC6.4.2.pdf SH2: A Low Power RISC Micro for Consumer Applications]}} It was the first CPU to support an efficient [[wikipedia:ARM Thumb|Thumb]]-like instruction set (with single-cycle instructions) and hardware support for [[wikipedia:Multiply–accumulate operation|multiply–accumulate]] (MAC) operations (two cycles per MAC operation). Between 1994 and 1996, 35.1 million SuperH devices were shipped worldwide, with a 32% share of the microprocessor market in 1996.{{ref|[http://segatech.com/technical/cpu/tech_sh4.html The SH7750 (SH-4 Series) MPU is a complete solution that helps reduce system OEM's time to market]}}
  
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The SH-5 design added a SIMD Instuction Set called SHmedia and also supports the SHcompact instruction set, equivalent to the user-mode parts of the SH-4 instruction set. This is similar to the Thumb Instruction Set of ARM architecture.
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Sega has used SuperH chips as the central processing unit for a number of video game consoles and arcade machines:
  
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The older designs are now supported and sold by [http://www.renesas.com/ Renesas].
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*[[SH-1]]: Used on the [[Sega Saturn]] console to control the CD-drive and to check copy protection on game discs.
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*[[SH-2]]: The main processor behind both the [[Sega 32X]] and [[Sega Saturn]]. Both consoles used two SH-2 processors in parallel.
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*[[SH-3]]: Not used in any Sega systems. The SH-3 was adopted by the [[wikipedia:Japan Aerospace Exploration Agency|Japan Aerospace Exploration Agency]] (JAXA) to power the [[wikipedia:Hayabusa|Hayabusa]] spacecraft (which traveled 6 billion km){{ref|[http://www.shmj.or.jp/english/pdf/ic/exhibi735E.pdf 32-bit RISC microprocessors/controllers with original architecture (Hitachi)]}} and [[wikipedia:MINERVA (spacecraft)|MINERVA]] rover.{{ref|1=[https://digitalcommons.usu.edu/cgi/viewcontent.cgi?article=1554&context=smallsat MINERVA rover which became a small artificial solar satellite]}}
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*[[SH-4]]: Used in the [[Sega Dreamcast]] console and [[arcade]] systems such as the [[NAOMI]], [[Hikaru]] and [[NAOMI 2]]. It was particularly suited for 3D graphics, capable of calculating 1.4 GFLOPS and more than 10 million lit polygons per second.{{ref|http://web.archive.org/web/20000823204755/computer.org/micro/articles/dreamcast_2.htm}} The SH-4 was introduced in 1997.{{ref|[http://segatech.com/technical/cpu/tech_sh4.html The SH7750 (SH-4 Series) MPU is a complete solution that helps reduce system OEM's time to market]}} It was the first CPU with [[wikipedia:4D vector|4D vector]] instructions, nearly a decade before the PowerPC VMX128 (2005) and Intel SSE4 (2006) instruction sets.
  
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The family includes:
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SH-3 and SH-5 chips also belong to the family, but were never utilised by Sega. Towards the early 2000s, the family had perhaps out-lived its potential in video gaming, however the technology continues to see widespread use in other forms of electronics. For example, the SuperH instruction set was adapted for the [[wikipedia:ARM architecture|ARM architecture]]'s [[wikipedia:ARM Thumb|Thumb]] instruction set.
  
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* SH-1 - 32-bit with maximum of 20MHz (As used on [[Sega Saturn]] to control the CD-drive and to check the Copy Protection on the game's CD)
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==References==
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* SH-2 - 32-bit with up to 28.7MHz (As used in the [[Sega Saturn]])
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<references/>
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* SH-3 - 32-bit with up to 200MHz. This spring introduced a Memory_management_unit to the SH Family  (As used in many [[Windows CE]] devices)
 
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* SH-4 - 32-bit dual-issue core with a 128-bit vector FPU (As used in the [[Dreamcast]] and on some Sega Arcade Machines such as the Naomi and Naomi 2)
 
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* SH-5 - 64-bit core with a 128-bit vector FPU (64 32-bit registers) and an integer unit which includes the SIMD support and 63 64-bit registers.  (The 64th register is hard-wired to zero.)
 
  
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Examples include ST Microelectronics's ST40 or Hitachi's SH-4.
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[[Category:Integrated circuits]]
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==Distinctions==
 
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* Low price
 
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* Low power consumption
 
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==External links==
 
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* http://www.superh.com/
 
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* http://www.renesas.com/
 
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Linux for SuperH
 
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* http://www.superhlinux.com/
 
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* http://www.sh-linux.org/
 
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* http://linuxdc.sourceforge.net/
 
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* [[http://www.shlinux.com/  MPC Data SHLinux support
 
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NetBSD on SuperH]]
 
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* http://www.netbsd.org/Ports/sh3/
 
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* http://www.netbsd.org/Ports/sh5/
 
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[[Category:Saturn Hardware]]
 

Latest revision as of 10:01, 29 September 2020

SuperH logo.svg

The SuperH (or SH) is a family of microprocessors, originally developed by Hitachi during the 1990s as the successor to the H8 family, and now supported by Renesas. They were notable for their time as being capable, yet relatively cheap units with low power consumption.

The SuperH family was introduced in 1992.[1] It was the first CPU to support an efficient Thumb-like instruction set (with single-cycle instructions) and hardware support for multiply–accumulate (MAC) operations (two cycles per MAC operation). Between 1994 and 1996, 35.1 million SuperH devices were shipped worldwide, with a 32% share of the microprocessor market in 1996.[2]

Sega has used SuperH chips as the central processing unit for a number of video game consoles and arcade machines:

  • SH-1: Used on the Sega Saturn console to control the CD-drive and to check copy protection on game discs.
  • SH-2: The main processor behind both the Sega 32X and Sega Saturn. Both consoles used two SH-2 processors in parallel.
  • SH-3: Not used in any Sega systems. The SH-3 was adopted by the Japan Aerospace Exploration Agency (JAXA) to power the Hayabusa spacecraft (which traveled 6 billion km)[3] and MINERVA rover.[4]
  • SH-4: Used in the Sega Dreamcast console and arcade systems such as the NAOMI, Hikaru and NAOMI 2. It was particularly suited for 3D graphics, capable of calculating 1.4 GFLOPS and more than 10 million lit polygons per second.[5] The SH-4 was introduced in 1997.[2] It was the first CPU with 4D vector instructions, nearly a decade before the PowerPC VMX128 (2005) and Intel SSE4 (2006) instruction sets.

SH-3 and SH-5 chips also belong to the family, but were never utilised by Sega. Towards the early 2000s, the family had perhaps out-lived its potential in video gaming, however the technology continues to see widespread use in other forms of electronics. For example, the SuperH instruction set was adapted for the ARM architecture's Thumb instruction set.

References

  1. ↑ SH2: A Low Power RISC Micro for Consumer Applications
  2. ↑ 2.0 2.1 The SH7750 (SH-4 Series) MPU is a complete solution that helps reduce system OEM's time to market
  3. ↑ 32-bit RISC microprocessors/controllers with original architecture (Hitachi)
  4. ↑ MINERVA rover which became a small artificial solar satellite
  5. ↑ htt (Wayback Machine: 2000-08-23 20:47)
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