Sega Model 1
From Sega Retro
Sega Model 1  

Manufacturer: Sega  

The Sega Model 1 (モデル1) is an arcade system board that was released by Sega in 1992. It is the successor to the Sega System 32 (released in 1990). While earlier Sega hardware was capable of handling 3D polygons (such as the Mega Drive, released in 1988), the Model 1 was Sega's first hardware specifically designed for 3D polygon graphics.
Originally, the Model 1 was simply known as the CG Board (CGボード), but was retroactively given the Model 1 name after work on the Model 2 began. The Model 1 was succeeded by the Sega Model 2 (released in 1993). Both the Model 1 and Model 2 were eventually succeeded by the Sega Model 3.
Contents
Hardware
The Model 1 board took three years to develop^{[3]}, with Yu Suzuki's Sega AM2 team involved in its development from the drawing board.^{[4]} It was intended to compete with Namco's System 21; Namco was then the market leader in polygonal 3D video games, with titles such as Galaxian³ and Starblade.^{[5]} The Model 1 was eventually released in 1992, debuting with Virtua Racing. While it was a significant improvement over the System 21, the Model 1 hardware was expensive, and only a few games were developed for the platform.
“  Dedicated 3D processors didn’t exist yet, and so I had to manually write a 3D graphics engine that would compress and process things faster. Just using assembly language. Now, of course, everyone writes in C++, but back then there was no other choice than machine code, otherwise we wouldn't be able to make everything fast enough.  „ 
— Yu Suzuki ^{[6]} 
Unlike the Model 2, Lockheed Martin was not involved with the development of the Model 1, but it was developed internally at Sega, before Lockheed Martin became involved with the development of the Sega Model 2, according to former Lockheed Martin employee, Real3D's Jon Lenyo, in 1998.^{[7]}
Like the Model 2, Fujitsu was involved with the development of the Model 1. They provided the DSP coprocesors, which were modified by Sega with custom microcode for hardware T&L capabilities;^{[8]} hardware T&L would not appear on consumer home systems for many years. Fujitsu also provided several other components, including the tilemap generator chip, the DMA controllers, and several memory chips.
The Model 1 also had support for the Mega Visor Display headset. It was used for only one known Model 1 game, Dennou Senki Net Merc. It is unknown whether Model 1 hardware was used for the VR1.
The hardware was designed to cope with 180,000 polygons per second^{[3]}.
Technical specifications
Technical specifications for Sega Model 1 hardware:^{[1]}
 Board composition: Main Board, Video Board, Memory Board, I/O Board, Communication Board, Sound Board, Motor Board, Audio Mix Board, Amp Board
 Board revisions: CPU Board 837‑8886171‑6298C (40 MHz), Video PCB 837‑7894 (36 MHz), Memory Board 837‑7893, I/O PCB 837‑8950‑01 (32 MHz), Motor PCB SJ25‑0155‑01 (8 MHz), Communication Board 837‑8842, Sound Board 837‑8679 (20 MHz), Audio Mix PCB 839‑0542, Amp PCB 838‑10018
 Fixed‑point arithmetic: 32‑bit RISC instructions, 3.5 MIPS
 Floating‑point unit: 32‑bit & 64‑bit operations, 16 MFLOPS
 Bus width: 32‑bit
 Additional CPU: 3× Zilog Z80 @ 4 MHz (8‑bit & 16‑bit instructions @ 1.74 MIPS)
 CPU for I/O Board, Comm Board and Motor Board
Sound
 Sound CPU: Toshiba TMP68000N‑10 (68000) @ 12 MHz
 Sound chips: 2× Sega 315‑5560 Custom MultiPCM
 Audio capabilities: 28 PCM channels per chip (one for music, one for sound effects), 56 PCM channels total
 Sound timer: Yamaha YM3834 @ 8 MHz
Graphics
Graphical capabilities of the Sega Model 1:^{[13]}
 GPU: 5× Fujitsu TGP MB86233 DSP, Sega 837‑7894 171‑6080D Video PCB
 GPU Geometrizer coprocessors: 5× Fujitsu TGP MB86233 DSP @ 16 MHz^{[14]}^{[15]}
 Coprocessor abilities: Floating decimal point operation function, axis rotation operation function, 3D matrix operation function, ALU, DMA controller, T&L (transform, clipping, lighting)^{[8]}
 Instruction set: 32‑bit instructions, 400 MIPS (80 MIPS each)^{[n 1]}
 Fixedpoint arithmetic: 160 MIPS (32 MIPS each)^{[n 2]}
 Floatingpoint units: 80 MFLOPS (16 MFLOPS each)^{[n 3]}
 Bus width: 160‑bit (32‑bit each)
 Notes: DSP coprocessors located on Main Board. DSP are modified by Sega with custom microcode for coprocessor and T&L capabilities.^{[8]}
 GPU Rasterizer Video Board: Sega 837‑7894 171‑6080D Video PCB @ 36 MHz,^{[17]} custom programmable logic devices programmed by Sega
 315‑5292: Fujitsu LSI (QFP160), Sega System 24 tilemap generator,^{[18]}^{[19]} 2D tiled backgrounds
 Sega 315‑5422A: Ricoh 5GU040010 (QFP160)
 Sega 315‑5423: Hitachi HG62E130R37F (QFP168)
 Sega 315‑5424A: Hitachi HG62E130R36F (QFP168)
 Sega 315‑5425: Hitachi HG62F58R12FL (QFP168)
 3x Sega 3155486: Lattice GAL16V8B25LP (DIP20), RGB output control
 Display resolution: 496×384 pixels, 24 kHz H‑Sync, progressive scan (non‑interlaced)
 Overscan resolution: 656×496 pixels
 Polygon framebuffer: 512×512, double buffering, 16bit color^{[n 4]}
 Color depth: 65,536 (16‑bit color) to 16,777,216 (16‑bit color, 256 luminance levels)
 Framebuffer color depth: 65,536 (16‑bit color)
 Graphical capabilities: Lighting, shading, flat shading, diffuse reflection, specular reflection, specular lighting, 2 layers of background scrolling, alpha blending, alpha channel
 Rendering fillrate: 68 MPixels/s
 Polygon fillrate: 36 MPixels/s^{[n 5]}
 Tilemap fillrate: 32 MPixels/s
 Geometry calculations: 80 MFLOPS
 Geometry transformations: 1.8 million vertices/sec,^{[n 6]} 450,000 polygons/sec^{[n 7]}
 Lighting calculations: 410,000 polygons/sec (flat),^{[n 8]} 380,000 polygons/sec (specular),^{[n 9]} 340,000 polygons/sec (Gouraud)^{[n 10]}
 Hardware rendering: 36 MPixels/s, lighting, flat shading
 410,000 polygons/sec: 80pixel polygons
 380,000 polygons/sec: Specular, 90pixel polygons
 180,000 polygons/sec:^{[22]} Specular, all hardware effects, 200pixel polygons
 Software rendering: Lighting
 160,000 polygons/sec: Gouraud shading, 32pixel polygons^{[n 11]}
 130,000 polygons/sec: Texture mapping, 32texel polygons^{[n 12]}
 120,000 polygons/sec: Texture mapping, Gouraud shading, 32texel polygons^{[n 13]}
 Hardware support: Sega VR
Memory
 Memory: Up to 39,166 KB (7008 KB main, 23,646 KB video, 8512 KB audio)
 System RAM: 2776 KB (1896 KB high‑speed SRAM)
 Main RAM: 480 KB (at least 156 KB SRAM)
 VRAM: 2232 KB (at least 1464 KB SRAM)
 Main Board: 768 KB (128 KB display lists, 576 KB tiles, 64 KB color)
 Video Board: 1464 KB SRAM (1024 KB framebuffers)
 Audio RAM: 64 KB (16 KB SRAM)
Bandwidth
 System RAM bandwidth: 664.224 MB/s
 Main RAM: 76 MB/s
 V60: 64 MB/s (32‑bit, 16 MHz)^{[32]}
 Z80: 12 MB/s (3× 8‑bit, 4 MHz)^{[33]}^{[34]}^{[29]}
 VRAM: 568.223776 MB/s
 DSP: 320 MB/s (5× 32‑bit, 16 MHz)^{[32]}
 Video Board: 248.223776 MB/s (112bit)
 315‑5422 & 315‑5292: 30.769232 MB/s (32‑bit, 7.692308 MHz, tilemaps)^{[35]}
 315‑5423: 72 MB/s (16‑bit, 36 MHz)^{[32]}
 315‑5424 & 315‑5425: 145.454544 MB/s (64‑bit, 18.181818 MHz, framebuffers)^{[36]}
 Audio RAM: 20 MB/s (16‑bit, 10 MHz)^{[33]}
 Internal processor bandwidth: 384 MB/s
 V60: 64 MB/s (32‑bit, 16 MHz)
 DSP cache: 320 MB/s (5× 32‑bit, 16 MHz)
 System ROM bandwidth: 64 MB/s (32‑bit, 16 MHz)^{[37]}
 Game ROM bandwidth: 211 MB/s (3× 32‑bit)
 EPROM: 64 MB/s (32‑bit, 16 MHz)^{[37]}
 MROM: 147 MB/s (2× 32‑bit, 20 MHz & 16.666667 MHz, 50/60 ns)^{[38]}^{[39]}
List of games
 Virtua Racing (1992)
 Virtua Formula (1993)
 Virtua Fighter (1993)
 Star Wars Arcade (1994)
 Wing War (1994)
 Dennou Senki Net Merc (1995)
Magazine articles
 Main article: Sega Model 1/Magazine articles.
Photo gallery
Official Sega of Japan photograph of various Model 1 PCBs
Notes
 ↑ [5 instructions per cycle^{[16]} 5 instructions per cycle^{[16]}]
 ↑ MAC (multiply–accumulate) operation (multiply and add) per cycle^{[16]}
 ↑ [1 operation per cycle (2 cycles per MAC operation, 2 cycles per divide)^{[16]} 1 operation per cycle (2 cycles per MAC operation, 2 cycles per divide)^{[16]}]
 ↑ [1024 KB, 512 KB per framebuffer, 2 bytes per pixel 1024 KB, 512 KB per framebuffer, 2 bytes per pixel]
 ↑ [144 MB/sec framebuffer bandwidth, doublebuffered, 16bit color 144 MB/sec framebuffer bandwidth, doublebuffered, 16bit color]
 ↑ [44 cycles (20 MAC operations, 2 divides) per vertex^{[13]} 44 cycles (20 MAC operations, 2 divides) per vertex^{[13]}]
 ↑ [4 vertices per quad polygon 4 vertices per quad polygon]
 ↑ [194 cycles (89 MAC operations, 8 divides) per quad polygon^{[13]} 194 cycles (89 MAC operations, 8 divides) per quad polygon^{[13]}]
 ↑ [206 cycles (95 MAC operations, 8 divides) per quad polygon^{[13]} 206 cycles (95 MAC operations, 8 divides) per quad polygon^{[13]}]
 ↑ [230 cycles (107 MAC operations, 8 divides) per quad polygon^{[20]}^{[21]} 230 cycles (107 MAC operations, 8 divides) per quad polygon^{[20]}^{[21]}]
 ↑ [388 cycles (309 geometry cycles, 40 RAM cycles, 39 raster operations) 400 cycles per 4scanline polygon (3 operations/scanline per polygon),^{[23]}^{[24]} 496 cycles per 32pixel polygon (3 cycles per pixel) 388 cycles (309 geometry cycles, 40 RAM cycles, 39 raster operations) 400 cycles per 4scanline polygon (3 operations/scanline per polygon),^{[23]}^{[24]} 496 cycles per 32pixel polygon (3 cycles per pixel)]
 ↑ [572 cycles (332 cycles flat shading, 240 cycles texture mapping) per 32texel polygon
 Flat shading: 332 cycles per 32pixel polygon (194 geometry cycles, 40 RAM cycles, 34 raster operations,^{[25]} 2 cycles per pixel)^{[26]}
 Texture mapping: 128 cycles per 32texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel)
 Texture mapping: 112 divide cycles per 32texel polygon: 56 divides per 32texel polygon, 24 vertex divide cycles per polygon (12 divides per polygon), 64 texel divide cycles per 32texel polygon (32 divides, 1 divide per texel)^{[27]} 572 cycles (332 cycles flat shading, 240 cycles texture mapping) per 32texel polygon
 Flat shading: 332 cycles per 32pixel polygon (194 geometry cycles, 40 RAM cycles, 34 raster operations,^{[25]} 2 cycles per pixel)^{[26]}
 Texture mapping: 128 cycles per 32texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel)
 Texture mapping: 112 divide cycles per 32texel polygon: 56 divides per 32texel polygon, 24 vertex divide cycles per polygon (12 divides per polygon), 64 texel divide cycles per 32texel polygon (32 divides, 1 divide per texel)^{[27]}]
 ↑ [628 cycles per 32texel polygon
 Gouraud shading: 388 cycles per 32pixel polygon
 Texture mapping: 240 cycles per 32texel polygon 628 cycles per 32texel polygon
 Gouraud shading: 388 cycles per 32pixel polygon
 Texture mapping: 240 cycles per 32texel polygon]
References
 ↑ ^{1.0} ^{1.1} Sega Model 1 Hardware Overview (MAME)
 ↑ Mean Machines Sega, "December 1994" (UK; 19941028), page 18
 ↑ ^{3.0} ^{3.1} Edge, "June 1994" (UK; 19940428), page 47
 ↑ http://www.1up.com/features/disappearancesuzukipart1?pager.offset=2 (archive.today)
 ↑ Mean Machines Sega, "May 1994" (UK; 199403xx), page 51
 ↑ Yu Suzuki Interview, Strana Igr, November 2013
 ↑ http://www.thg.ru/smoke/19991022/print.html
 ↑ ^{8.0} ^{8.1} ^{8.2} TGP (MAME)
 ↑ File:Overview of 32bit VSeries Microprocessor.pdf
 ↑ File:UPD70616ProgrammersReferenceManual.pdf
 ↑ File:MB89396 datasheet.pdf
 ↑ File:MB89374 datasheet.pdf
 ↑ ^{13.0} ^{13.1} ^{13.2} ^{13.3} Sega Model 1 Video Hardware (MAME)
 ↑ Sega Model 1 ROM Dump
 ↑ ^{15.0} ^{15.1} File:MB86232 datasheet.pdf
 ↑ ^{16.0} ^{16.1} ^{16.2} File:MB86232 datasheet.pdf, page 32
 ↑ MODEL1 (アーケードゲーム基板@ ウィキ)
 ↑ Sega 16‑Bit Common Hardware, MAME
 ↑ Sega System 24 Hardware Notes (20130616)
 ↑ Sega Model 2 Geometry Engine and 3D Rasterizer (MAME)
 ↑ Design of Digital Systems and Devices (pages 9597)
 ↑ File:GameOn US 06.pdf, page 11
 ↑ Transformation Of Rendering Algorithms For Hardware Implementation (page 53)
 ↑ File:32XUSHardwareManual.pdf, page 76
 ↑ Algorithms for Parallel Polygon Rendering (pages 3336)
 ↑ Algorithms for Parallel Polygon Rendering (page 35)
 ↑ State of the Art in Computer Graphics: Visualization and Modeling (page 110)
 ↑ File:MB8421 datasheet.pdf
 ↑ ^{29.0} ^{29.1} File:MB8431 datasheet.pdf
 ↑ Virtua Formula (MAME)
 ↑ Virtua Fighter (MAME)
 ↑ ^{32.0} ^{32.1} ^{32.2} File:M5M5178AP datasheet.pdf
 ↑ ^{33.0} ^{33.1} File:MB8464A datasheet.pdf
 ↑ MB8432 Datasheet, Fujitsu
 ↑ File:HM658128A datasheet.pdf
 ↑ File:HM65256B datasheet.pdf
 ↑ ^{37.0} ^{37.1} File:HN27C1024 datasheet.pdf
 ↑ File:MB8316200B datasheet.pdf
 ↑ File:MB834000 datasheet.pdf
Sega Arcade Boards  

Originating in Arcades  
76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  00  01  02  03  04  05  06  07  08 
Fonz  Galaxian  Zaxxon  Appoooh  X Board  Model 2  Hikaru  Atomiswave  
Blockade  G80  HangOn / Space Harrier  Model 1  H1  Model 3  NAOMI 2  
VIC Dual  System 1  System 24  NAOMI  
VCO Object  LaserDisc  System SP  
System 2  System 18  
System 16  
OutRun  System 32  
Gigas  
Y Board  
Based on Consumer Hardware  
83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  00  01  02  03  04  05  06  07  08  09  10  11  12  13  14  15 
SG1000  System E  System C  Triforce  EuropaR  RingEdge 2  
MegaTech System  Sega Titan Video  Chihiro  Nu  
Mega Play  Lindbergh  
RingEdge  
RingWide  
Hardware Series / Generations  
1960s  1970s  1980s  1990s  2000s  2010s  
Electromechanical systems  Sega System series  Sega NAOMI series  
Discrete logic systems  Super Scaler series  PostNAOMI systems  
PreSystem boards  Sega Model series 